  u   8     (              ɴ                                                                      ,radxa,zero-3w rockchip,rk3566            7Radxa ZERO 3W      aliases          =/pinctrl/gpio@fdd60000           C/pinctrl/gpio@fe740000           I/pinctrl/gpio@fe750000           O/pinctrl/gpio@fe760000           U/pinctrl/gpio@fe770000           [/i2c@fdd40000            `/i2c@fe5a0000            e/i2c@fe5b0000            j/i2c@fe5c0000            o/i2c@fe5d0000            t/i2c@fe5e0000            y/serial@fdd50000             /serial@fe650000             /serial@fe660000             /serial@fe670000             /serial@fe680000             /serial@fe690000             /serial@fe6a0000             /serial@fe6b0000             /serial@fe6c0000             /serial@fe6d0000             /spi@fe610000            /spi@fe620000            /spi@fe630000            /spi@fe640000            /mmc@fe310000            /mmc@fe2b0000            /mmc@fe2c0000         cpus                                 cpu@0            cpu          ,arm,cortex-a55                                                      psci                        -   @        ?           L           Y   @        k           x                                    
      cpu@100          cpu          ,arm,cortex-a55                                     psci                        -   @        ?           L           Y   @        k           x                                          cpu@200          cpu          ,arm,cortex-a55                                     psci                        -   @        ?           L           Y   @        k           x                                          cpu@300          cpu          ,arm,cortex-a55                                     psci                        -   @        ?           L           Y   @        k           x                                             l3-cache             ,cache                               "           /   @        A                    display-subsystem            ,rockchip,display-subsystem                   firmware       scmi             ,arm,scmi-smc            Ђ                                          protocol@14                                               hdmi-sound           ,simple-audio-card           HDMI            i2s                    8okay       simple-audio-card,codec         ?         simple-audio-card,cpu           ?   	         pmu          ,arm,cortex-a55-pmu        0  I                                                T   
               psci             ,arm,psci-1.0            smc       reserved-memory                                   g   shmem@10f000             ,arm,scmi-shmem                                 n                    timer            ,arm,armv8-timer       0  I                                 
            u      xin24m           ,fixed-clock         n6         xin24m                               xin32k           ,fixed-clock                    xin32k                     default                   sata@fc400000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci               @                                            sata pmalive rxoob          I       _                       	  sata-phy                                   	  8disabled          sata@fc800000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci                                                           sata pmalive rxoob          I       `                       	  sata-phy                                   	  8disabled          usb@fcc00000             ,rockchip,rk3568-dwc3 snps,dwc3                      @          I                                             ref_clk suspend_clk bus_clk         otg       
  
utmi_wide                                                8okay                     	  usb2-phy            3           :high-speed        usb@fd000000             ,rockchip,rk3568-dwc3 snps,dwc3                       @          I                                             ref_clk suspend_clk bus_clk         host                             usb2-phy usb3-phy         
  
utmi_wide                                                8okay          interrupt-controller@fd400000            ,arm,gic-v3                @             F                 I      	            H        ]           n    A          x  (                     g                                                msi-controller@fd440000          ,arm,gic-v3-its               D                                                 W         usb@fd800000             ,generic-ehci                                  I                                                        usb       	  8disabled          usb@fd840000             ,generic-ohci                                  I                                                        usb       	  8disabled          usb@fd880000             ,generic-ehci                                  I                                                        usb       	  8disabled          usb@fd8c0000             ,generic-ohci                                  I                                                        usb       	  8disabled          syscon@fdc20000       )   ,rockchip,rk3568-pmugrf syscon simple-mfd                                     U   io-domains        &   ,rockchip,rk3568-pmu-io-voltage-domain           8okay                                                                                                                syscon@fdc50000                                 ,rockchip,rk3566-pipe-grf syscon                  syscon@fdc60000       &   ,rockchip,rk3568-grf syscon simple-mfd                                           syscon@fdc80000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                        syscon@fdc90000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                        syscon@fdca0000       #   ,rockchip,rk3568-usb2phy-grf syscon                                         syscon@fdca8000       #   ,rockchip,rk3568-usb2phy-grf syscon               ʀ                         clock-controller@fdd00000            ,rockchip,rk3568-pmucru                                           +                    clock-controller@fdd20000            ,rockchip,rk3568-cru                                           xin24m                     +           8                          H   G          ]              t                     i2c@fdd40000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c                               I       .                        -      	  i2c pclk               !        default                                   8okay       pmic@20          ,rockchip,rk817                                  rk817-clkout1 rk817-clkout2              "        I              default            #                             $           $           $           $           $           $           $           $           %              regulators     DCDC_REG1         
  vdd_logic            "         6        H           _          w p          q   regulator-state-mem                            DCDC_REG2           vdd_gpu_npu          "         6        H           _          w p          q           D   regulator-state-mem                   DCDC_REG3           vcc_ddr          "         6        H      regulator-state-mem                   DCDC_REG4           vcc3v3_sys           "         6        H           _ 2Z        w 2Z           \   regulator-state-mem                   2Z         LDO_REG1            vcca1v8_pmu          "         6        _ w@        w w@              regulator-state-mem                   w@         LDO_REG2          	  vdda_0v9             "         6        _         w            Q   regulator-state-mem                   LDO_REG3            vdda0v9_pmu          "         6        _         w    regulator-state-mem                            LDO_REG4            vccio_acodec             "         6        _ 2Z        w 2Z              regulator-state-mem                   LDO_REG5          	  vccio_sd             "         6        _ w@        w 2Z              regulator-state-mem                   LDO_REG6            vcc3v3_pmu           "         6        _ 2Z        w 2Z              regulator-state-mem                   2Z         LDO_REG7          
  vcc_1v8_p            "         6        _ w@        w w@              regulator-state-mem                   LDO_REG8            vcc1v8_dvp           "         6        _ w@        w w@   regulator-state-mem                   LDO_REG9            vcc2v8_dvp           "         6        _ *        w *   regulator-state-mem                   BOOST           vcc5v_midu           "         6        _ LK@        w LK@           %   regulator-state-mem                   OTG_SWITCH          vbus       regulator-state-mem                         regulator@40             ,rockchip,rk8600             @                   vdd_cpu          "         6        _ 
4        w 5                     $              regulator-state-mem                      serial@fdd50000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                                 I       t                        ,        baudclk apb_pclk               &       &              '        default                    +         	  8disabled          pwm@fdd70000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                            0      	  pwm pclk               (        default         5         	  8disabled          pwm@fdd70010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                           0      	  pwm pclk               )        default         5         	  8disabled          pwm@fdd70020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                            0      	  pwm pclk               *        default         5         	  8disabled          pwm@fdd70030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm               0                            0      	  pwm pclk               +        default         5         	  8disabled          power-management@fdd90000         &   ,rockchip,rk3568-pmu syscon simple-mfd                            power-controller          !   ,rockchip,rk3568-power-controller            @                                           power-domain@7                                           T   ,        @          power-domain@8                                           T   -   .   /        @          power-domain@9              	                                   T   0   1   2        @          power-domain@10             
                             T   3   4   5   6   7   8        @          power-domain@11                                    T   9        @          power-domain@13                                   T   :        @          power-domain@14                                   T   ;   <   =        @          power-domain@15                                    T   >   ?   @   A   B        @                gpu@fde60000          &   ,rockchip,rk3568-mali arm,mali-bifrost                        @       $  I       (          )          '           [job mmu gpu                              gpu bus                                  8okay               C        k   D                 video-codec@fdea0400             ,rockchip,rk3568-vpu                               I                  [vdpu                               
  aclk hclk           w   E                    iommu@fdea0800           ,rockchip,rk3568-iommu                        @        I                  aclk iface                                             ~               E      rga@fdeb0000          (   ,rockchip,rk3568-rga rockchip,rk3288-rga                              I       Z                                      aclk hclk sclk               &     $     %        core axi ahb                  
      video-codec@fdee0000             ,rockchip,rk3568-vepu                                  I       @                              
  aclk hclk           w   F              
      iommu@fdee0800           ,rockchip,rk3568-iommu                        @        I       ?                                aclk iface                
        ~               F      mmc@fe000000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc                       @         I       d                                           biu ciu ciu-drive ciu-sample                       р                      reset         	  8disabled          ethernet@fe010000         &   ,rockchip,rk3568-gmac snps,dwmac-4.20a                                 I                             [macirq eth_wake_irq       @                                                     W  stmmaceth mac_clk_rx mac_clk_tx clk_mac_refout aclk_mac pclk_mac clk_mac_speed ptp_ref                      
  stmmaceth           t               G                    H           I               	  8disabled       mdio             ,snps,dwmac-mdio                                 stmmac-axi-config                                             
                         G      rx-queues-config            *              H   queue0           tx-queues-config            @              I   queue0              vop@fe040000                          0     @                Vvop gamma-lut           I                (                                       %  aclk hclk dclk_vp0 dclk_vp1 dclk_vp2            w   J              	        t            8okay             ,rockchip,rk3566-vop         8                    ]               ports                                           port@0                                            endpoint@2                      `   K           S         port@1                                              port@2                                                    iommu@fe043e00           ,rockchip,rk3568-iommu                 >            ?                I                                       aclk iface          ~                  	        8okay               J      dsi@fe060000          *   ,rockchip,rk3568-mipi-dsi snps,dw-mipi-dsi                                 I       D           pclk                           dphy               L              	        apb                      t          	  8disabled       ports                                port@0                     port@1                          dsi@fe070000          *   ,rockchip,rk3568-mipi-dsi snps,dw-mipi-dsi                                 I       E           pclk                           dphy               M              	        apb                      t          	  8disabled       ports                                port@0                     port@1                          hdmi@fe0a0000            ,rockchip,rk3568-dw-hdmi              
                 I       -         (                          (              iahb isfr cec ref           default            N   O   P              	                   t            p            8okay               Q           R              ports                                port@0                  endpoint            `   S           K         port@1                 endpoint            `   T                          qos@fe128000             ,rockchip,rk3568-qos syscon                                   ,      qos@fe138080             ,rockchip,rk3568-qos syscon                                  ;      qos@fe138100             ,rockchip,rk3568-qos syscon                                   <      qos@fe138180             ,rockchip,rk3568-qos syscon                                  =      qos@fe148000             ,rockchip,rk3568-qos syscon                                   -      qos@fe148080             ,rockchip,rk3568-qos syscon                                  .      qos@fe148100             ,rockchip,rk3568-qos syscon                                   /      qos@fe150000             ,rockchip,rk3568-qos syscon                                    9      qos@fe158000             ,rockchip,rk3568-qos syscon                                   3      qos@fe158100             ,rockchip,rk3568-qos syscon                                   4      qos@fe158180             ,rockchip,rk3568-qos syscon                                  5      qos@fe158200             ,rockchip,rk3568-qos syscon                                   6      qos@fe158280             ,rockchip,rk3568-qos syscon                                  7      qos@fe158300             ,rockchip,rk3568-qos syscon                                   8      qos@fe180000             ,rockchip,rk3568-qos syscon                               qos@fe190000             ,rockchip,rk3568-qos syscon                                    >      qos@fe190280             ,rockchip,rk3568-qos syscon                                  ?      qos@fe190300             ,rockchip,rk3568-qos syscon                                   @      qos@fe190380             ,rockchip,rk3568-qos syscon                                  A      qos@fe190400             ,rockchip,rk3568-qos syscon                                   B      qos@fe198000             ,rockchip,rk3568-qos syscon                                   :      qos@fe1a8000             ,rockchip,rk3568-qos syscon                                   0      qos@fe1a8080             ,rockchip,rk3568-qos syscon                                  1      qos@fe1a8100             ,rockchip,rk3568-qos syscon                                   2      dfi@fe230000             ,rockchip,rk3568-dfi              #                 I                     U      pcie@fe260000            ,rockchip,rk3568-pcie          0              @      &                               Vdbi apb config        <  I       K          J          I          H          G           [sys pmc msg legacy err                       (                                       $  aclk_mst aclk_slv aclk_dbi pclk aux          pci         ]                                `                    V                      V                     V                     V                                                               W                                      	  pcie-phy                        T  g                                                    @              @                         pipe                                   	  8disabled       legacy-interrupt-controller                      ]            H                     I       H              V         mmc@fe2b0000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc              +        @         I       b                                           biu ciu ciu-drive ciu-sample                       р                      reset           8okay            )            3         D        default            X   Y   Z   [        O   \        [         mmc@fe2c0000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc              ,        @         I       c                                           biu ciu ciu-drive ciu-sample                       р                      reset           8okay            )            3         h         u           ]                                   default            ^   _   `                 O           [         spi@fe300000             ,rockchip,sfc                 0        @         I       e                  x      v        clk_sfc hclk_sfc               a        default       	  8disabled          mmc@fe310000             ,rockchip,rk3568-dwcmshc              1                 I                  8      {      }        H n6       (         |      z      y      {      }        core bus axi block timer            8okay            )                                                                 default            b   c   d   e        O           [         rng@fe388000             ,rockchip,rk3568-rng              8       @                p      o      	  core ahb                  m      	  8disabled          i2s@fe400000             ,rockchip,rk3568-i2s-tdm              @                 I       4           8      =      A        HFq Fq                ?      C      9        mclk_tx mclk_rx hclk               f            tx                P      Q      
  tx-m rx-m           t            p            8okay               	      i2s@fe410000             ,rockchip,rk3568-i2s-tdm              A                 I       5           8      E      I        HFq Fq                G      K      :        mclk_tx mclk_rx hclk               f      f           rx tx                 R      S      
  tx-m rx-m           t            default       0     g   h   i   j   k   l   m   n   o   p   q   r        p          	  8disabled          i2s@fe420000             ,rockchip,rk3568-i2s-tdm              B                 I       6           8      M        HFq                O      O      ;        mclk_tx mclk_rx hclk               f      f           tx rx                 T        tx-m            t            default            s   t   u   v        p          	  8disabled          i2s@fe430000             ,rockchip,rk3568-i2s-tdm              C                 I       7                  S      W      <        mclk_tx mclk_rx hclk               f      f           tx rx                 U      V      
  tx-m rx-m           t            p          	  8disabled          pdm@fe440000             ,rockchip,rk3568-pdm              D                 I       L                  Z      Y        pdm_clk pdm_hclk               f   	        rx             w   x   y   z   {   |        default               X        pdm-m           p          	  8disabled          spdif@fe460000           ,rockchip,rk3568-spdif                F                 I       f         
  mclk hclk                  _      \           f           tx          default            }        p          	  8disabled          dma-controller@fe530000          ,arm,pl330 arm,primecell              S        @         I                                                 	  apb_pclk            		              &      dma-controller@fe550000          ,arm,pl330 arm,primecell              U        @         I                                                 	  apb_pclk            		              f      i2c@fe5a0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              Z                 I       /                 H     G      	  i2c pclk               ~        default                                 	  8disabled          i2c@fe5b0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              [                 I       0                 J     I      	  i2c pclk                       default                                 	  8disabled          i2c@fe5c0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              \                 I       1                 L     K      	  i2c pclk                       default                                 	  8disabled          i2c@fe5d0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              ]                 I       2                 N     M      	  i2c pclk                       default                                 	  8disabled          i2c@fe5e0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              ^                 I       3                 P     O      	  i2c pclk                       default                                 	  8disabled          watchdog@fe600000             ,rockchip,rk3568-wdt snps,dw-wdt              `                 I                                   
  tclk pclk         spi@fe610000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              a                 I       g                 R     Q        spiclk apb_pclk            &      &           tx rx           default                                                  	  8disabled          spi@fe620000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              b                 I       h                 T     S        spiclk apb_pclk            &      &           tx rx           default                                                  	  8disabled          spi@fe630000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              c                 I       i                 V     U        spiclk apb_pclk            &      &           tx rx           default                                                  	  8disabled          spi@fe640000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              d                 I       j                 X     W        spiclk apb_pclk            &      &           tx rx           default                                                  	  8disabled          serial@fe650000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                e                 I       u                              baudclk apb_pclk               &      &                            default                    +           8okay             	      serial@fe660000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                f                 I       v                 #              baudclk apb_pclk               &      &                      default                    +           8okay          serial@fe670000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                g                 I       w                 '     $        baudclk apb_pclk               &      &                      default                    +         	  8disabled          serial@fe680000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                h                 I       x                 +     (        baudclk apb_pclk               &      &   	                   default                    +         	  8disabled          serial@fe690000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                i                 I       y                 /     ,        baudclk apb_pclk               &   
   &                      default                    +         	  8disabled          serial@fe6a0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                j                 I       z                 3     0        baudclk apb_pclk               &      &                      default                    +         	  8disabled          serial@fe6b0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                k                 I       {                 7     4        baudclk apb_pclk               &      &                      default                    +         	  8disabled          serial@fe6c0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                l                 I       |                 ;     8        baudclk apb_pclk               &      &                      default                    +         	  8disabled          serial@fe6d0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                m                 I       }                 ?     <        baudclk apb_pclk               &      &                      default                    +         	  8disabled          thermal-zones      cpu-thermal         	$   d        	:          	H          trips      cpu_alert0          	X p        	d           passive                  cpu_alert1          	X $        	d           passive       cpu_crit            	X s        	d        	   critical             cooling-maps       map0            	o         0  	t   
                     gpu-thermal         	$           	:          	H         trips      gpu-threshold           	X p        	d           passive       gpu-target          	X $        	d           passive                  gpu-crit            	X s        	d        	   critical             cooling-maps       map0            	o           	t                  tsadc@fe710000           ,rockchip,rk3568-tsadc                q                 I       s           8                  Hf@ 
`                           tsadc apb_pclk                                 t            	 s        default sleep                      	           	           8okay            	           	                     saradc@fe720000       .   ,rockchip,rk3568-saradc rockchip,rk3399-saradc                r                 I       ]                              saradc apb_pclk                      saradc-apb          	           8okay            	         pwm@fe6e0000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n                       Z     Y      	  pwm pclk                       default         5         	  8disabled          pwm@fe6e0010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n                      Z     Y      	  pwm pclk                       default         5         	  8disabled          pwm@fe6e0020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n                       Z     Y      	  pwm pclk                       default         5         	  8disabled          pwm@fe6e0030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n 0                     Z     Y      	  pwm pclk                       default         5         	  8disabled          pwm@fe6f0000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o                       ]     \      	  pwm pclk                       default         5         	  8disabled          pwm@fe6f0010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o                      ]     \      	  pwm pclk                       default         5         	  8disabled          pwm@fe6f0020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o                       ]     \      	  pwm pclk                       default         5         	  8disabled          pwm@fe6f0030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o 0                     ]     \      	  pwm pclk                       default         5         	  8disabled          pwm@fe700000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p                       `     _      	  pwm pclk                       default         5         	  8disabled          pwm@fe700010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p                      `     _      	  pwm pclk                       default         5         	  8disabled          pwm@fe700020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p                       `     _      	  pwm pclk                       default         5         	  8disabled          pwm@fe700030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p 0                     `     _      	  pwm pclk                       default         5         	  8disabled          phy@fe830000             ,rockchip,rk3568-naneng-combphy                                       "     }              ref apb pipe            8      "        H                      phy         

           
           
2           8okay                     phy@fe840000             ,rockchip,rk3568-naneng-combphy                                       %     ~              ref apb pipe            8      %        H                      phy         

           
           
2         	  8disabled                     phy@fe870000             ,rockchip,rk3568-csi-dphy                                        y        pclk            
2                         apb         t          	  8disabled          mipi-dphy@fe850000           ,rockchip,rk3568-dsi-dphy                                	  ref pclk                        z        
2                  	        apb                    	  8disabled               L      mipi-dphy@fe860000           ,rockchip,rk3568-dsi-dphy                                	  ref pclk                        {        
2                  	        apb                    	  8disabled               M      usb2phy@fe8a0000             ,rockchip,rk3568-usb2phy                                              phyclk          clk_usbphy0_480m            I                  
=                       8okay                  host-port           
2            8okay                     otg-port            
2            8okay                        usb2phy@fe8b0000             ,rockchip,rk3568-usb2phy                                              phyclk          clk_usbphy1_480m            I                  
=                     	  8disabled       host-port           
2          	  8disabled                     otg-port            
2          	  8disabled                        pinctrl          ,rockchip,rk3568-pinctrl         t               U                                  g              gpio@fdd60000            ,rockchip,gpio-bank                                I       !                  .               
M        
]                       
i            H        ]         B  
u                        pin-10 [GPIO0_D0] pin-08 [GPIO0_D1]                    "      gpio@fe740000            ,rockchip,gpio-bank               t                 I       "                 c     d         
M        
]                       
i            H        ]         S  
upin-03 [GPIO1_A0] pin-05 [GPIO1_A1]   pin-37 [GPIO1_A4]                                   gpio@fe750000            ,rockchip,gpio-bank               u                 I       #                 e     f         
M        
]          @            
i            H        ]            
u                                      gpio@fe760000            ,rockchip,gpio-bank               v                 I       $                 g     h         
M        
]          `            
i            H        ]        0  
u pin-11 [GPIO3_A1] pin-13 [GPIO3_A2] pin-12 [GPIO3_A3] pin-35 [GPIO3_A4] pin-40 [GPIO3_A5] pin-38 [GPIO3_A6] pin-36 [GPIO3_A7] pin-15 [GPIO3_B0] pin-16 [GPIO3_B1] pin-18 [GPIO3_B2] pin-29 [GPIO3_B3] pin-31 [GPIO3_B4]     pin-22 [GPIO3_C1] pin-32 [GPIO3_C2] pin-33 [GPIO3_C3] pin-07 [GPIO3_C4]                  gpio@fe770000            ,rockchip,gpio-bank               w                 I       %                 i     j         
M        
]                      
i            H        ]           
u          pin-27 [GPIO4_B2] pin-28 [GPIO4_B3]       pin-23 [GPIO4_C2] pin-19 [GPIO4_C3]  pin-21 [GPIO4_C5] pin-24 [GPIO4_C6]                  pcfg-pull-up             
                 pcfg-pull-none           
                 pcfg-pull-none-drv-level-1           
        
                    pcfg-pull-none-drv-level-2           
        
                    pcfg-pull-none-drv-level-3           
        
                    pcfg-pull-up-drv-level-1             
        
                    pcfg-pull-up-drv-level-2             
        
                    pcfg-pull-none-smt           
         
                 acodec        audiopwm          bt656         bt1120        cam       can0          can1          can2          cif       clk32k     clk32k-out0         
                                 cpu       ebc       edpdp         emmc       emmc-bus8           
                                                                                                           b      emmc-clk            
                       c      emmc-cmd            
                       d      emmc-datastrobe         
                       e         eth0          eth1          flash         fspi       fspi-pins         `  
                                                                                   a         gmac0         gmac1         gpu       hdmitx     hdmitxm0-cec            
                       P      hdmitx-scl          
                       N      hdmitx-sda          
                       O         i2c0       i2c0-xfer            
       	             
                 !         i2c1       i2c1-xfer            
                                     ~         i2c2       i2c2m0-xfer          
                                              i2c3       i2c3m0-xfer          
                                             i2c4       i2c4m0-xfer          
                  
                          i2c5       i2c5m0-xfer          
                                            i2s1       i2s1m0-lrckrx           
                       j      i2s1m0-lrcktx           
                       i      i2s1m0-sclkrx           
                       h      i2s1m0-sclktx           
                       g      i2s1m0-sdi0         
                       k      i2s1m0-sdi1         
      
                 l      i2s1m0-sdi2         
      	                 m      i2s1m0-sdi3         
                       n      i2s1m0-sdo0         
                       o      i2s1m0-sdo1         
                       p      i2s1m0-sdo2         
      	                 q      i2s1m0-sdo3         
      
                 r         i2s2       i2s2m0-lrcktx           
                       t      i2s2m0-sclktx           
                       s      i2s2m0-sdi          
                       u      i2s2m0-sdo          
                       v         i2s3          isp       jtag          lcdc          mcu       npu       pcie20        pcie30x1          pcie30x2          pdm    pdmm0-clk           
                       w      pdmm0-clk1          
                       x      pdmm0-sdi0          
                       y      pdmm0-sdi1          
      
                 z      pdmm0-sdi2          
      	                 {      pdmm0-sdi3          
                       |         pmic       pmic-int-l          
                         #         pmu       pwm0       pwm0m0-pins         
                        (         pwm1       pwm1m0-pins         
                        )         pwm2       pwm2m0-pins         
                        *         pwm3       pwm3-pins           
                        +         pwm4       pwm4-pins           
                                 pwm5       pwm5-pins           
                                 pwm6       pwm6-pins           
                                 pwm7       pwm7-pins           
                                 pwm8       pwm8m0-pins         
      	                          pwm9       pwm9m0-pins         
      
                          pwm10      pwm10m0-pins            
                                pwm11      pwm11m0-pins            
                                pwm12      pwm12m0-pins            
                                pwm13      pwm13m0-pins            
                                pwm14      pwm14m0-pins            
                                pwm15      pwm15m0-pins            
                                refclk        sata          sata0         sata1         sata2         scr       sdmmc0     sdmmc0-bus4       @  
                                                            X      sdmmc0-clk          
                       Y      sdmmc0-cmd          
                       Z      sdmmc0-det          
                        [         sdmmc1     sdmmc1-bus4       @  
                                                           ^      sdmmc1-clk          
                       _      sdmmc1-cmd          
                       `         sdmmc2        spdif      spdifm0-tx          
                       }         spi0       spi0m0-pins       0  
                                                        spi0m0-cs0          
                              spi0m0-cs1          
                                 spi1       spi1m0-pins       0  
                                                     spi1m0-cs0          
                             spi1m0-cs1          
                                spi2       spi2m0-pins       0  
                                                     spi2m0-cs0          
                             spi2m0-cs1          
                                spi3       spi3m0-pins       0  
                              
                       spi3m0-cs0          
                             spi3m0-cs1          
                                tsadc      tsadc-shutorg           
                              tsadc-pin           
                                  uart0      uart0-xfer           
                                     '         uart1      uart1m0-xfer             
                                         uart1m0-ctsn            
                             uart1m0-rtsn            
                                uart2      uart2m0-xfer             
                                              uart3      uart3m0-xfer             
                                             uart4      uart4m0-xfer             
                                            uart5      uart5m0-xfer             
                                            uart6      uart6m0-xfer             
                                            uart7      uart7m0-xfer             
                                            uart8      uart8m0-xfer             
                                            uart9      uart9m0-xfer             
                                            vop       spi0-hs       spi1-hs       spi2-hs       spi3-hs       gmac-txd-level3       gmac-txc-level2       leds       user-led2           
                                   bluetooth      bt-reg-on-h         
                    bt-wake-host-h          
                    host-wake-bt-h          
                       wifi       wifi-reg-on-h           
                               wifi-wake-host-h            
                          opp-table-0          ,operating-points-v2          
              opp-408000000           
    Q         
 P P 0        
  @      opp-600000000           
    #F         
 P P 0        
  @      opp-816000000           
    0,         
 P P 0        
  @               opp-1104000000          
    Aʹ         
   0        
  @      opp-1416000000          
    Tfr         
   0        
  @         opp-table-1          ,operating-points-v2            C   opp-200000000           
             
 P P B@      opp-300000000           
             
 P P B@      opp-400000000           
    ׄ         
 P P B@      opp-600000000           
    #F         
   B@      opp-700000000           
    )'         
 ~ ~ B@         chosen          serial2:1500000n8         hdmi-con             ,hdmi-connector           d      port       endpoint            `              T            leds          
   ,gpio-leds           default               led-green                       on        
  .heartbeat           7   "              
  =heartbeat            regulator-1v8-vcc            ,regulator-fixed         vcc_1v8          "         6        _ w@        w w@                            regulator-1v8-vcca           ,regulator-fixed       	  vcca_1v8             "         6        _ w@        w w@                            regulator-1v8-vcca-image             ,regulator-fixed         vcca1v8_image            "         6        _ w@        w w@                      R      regulator-3v3-vcc            ,regulator-fixed         vcc_3v3          "         6        _ 2Z        w 2Z           \                 regulator-5v0-vcc-sys            ,regulator-fixed         vcc_sys          "         6        _ LK@        w LK@           $      sdio-pwrseq          ,mmc-pwrseq-simple                        
  ext_clock           default                    S   d        j LK@        }   "                 ]         	interrupt-parent #address-cells #size-cells compatible model gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 serial0 serial1 serial2 serial3 serial4 serial5 serial6 serial7 serial8 serial9 spi0 spi1 spi2 spi3 mmc0 mmc1 mmc2 device_type reg clocks #cooling-cells enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache operating-points-v2 cpu-supply phandle cache-level cache-unified ports arm,smc-id shmem #clock-cells simple-audio-card,name simple-audio-card,format simple-audio-card,mclk-fs status sound-dai interrupts interrupt-affinity ranges no-map arm,no-tick-in-suspend clock-frequency clock-output-names pinctrl-0 pinctrl-names clock-names phys phy-names ports-implemented power-domains dr_mode phy_type resets snps,dis_u2_susphy_quirk extcon maximum-speed interrupt-controller #interrupt-cells mbi-alias mbi-ranges msi-controller dma-noncoherent #msi-cells pmuio1-supply pmuio2-supply vccio1-supply vccio2-supply vccio3-supply vccio4-supply vccio5-supply vccio6-supply vccio7-supply #reset-cells assigned-clocks assigned-clock-rates assigned-clock-parents rockchip,grf system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply regulator-name regulator-always-on regulator-boot-on regulator-initial-mode regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-off-in-suspend regulator-suspend-microvolt regulator-on-in-suspend fcs,suspend-voltage-selector vin-supply dmas reg-io-width reg-shift #pwm-cells #power-domain-cells pm_qos interrupt-names mali-supply iommus #iommu-cells reset-names fifo-depth max-frequency snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso snps,blen snps,rd_osr_lmt snps,wr_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use reg-names remote-endpoint #sound-dai-cells avdd-0v9-supply avdd-1v8-supply rockchip,pmu bus-range interrupt-map-mask interrupt-map linux,pci-domain num-ib-windows num-ob-windows max-link-speed msi-map num-lanes bus-width cap-sd-highspeed disable-wp vmmc-supply vqmmc-supply cap-sdio-irq keep-power-in-suspend mmc-pwrseq no-mmc no-sd non-removable sd-uhs-sdr104 cap-mmc-highspeed mmc-hs200-1_8v no-sdio dma-names arm,pl330-periph-burst #dma-cells uart-has-rtscts polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device rockchip,hw-tshut-temp pinctrl-1 #thermal-sensor-cells rockchip,hw-tshut-mode rockchip,hw-tshut-polarity #io-channel-cells vref-supply rockchip,pipe-grf rockchip,pipe-phy-grf #phy-cells rockchip,usbgrf gpio-controller gpio-ranges #gpio-cells gpio-line-names bias-pull-up bias-disable drive-strength input-schmitt-enable rockchip,pins opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend stdout-path color default-state function gpios linux,default-trigger post-power-on-delay-ms power-off-delay-us reset-gpios 