     8     (            Q  h                             )    rockchip,rk3562-evb2-v10 rockchip,rk3562                                     +            7Rockchip RK3562 EVB V20 Board      aliases          =/pinctrl/gpio@ff260000           C/pinctrl/gpio@ff620000           I/pinctrl/gpio@ff630000           O/pinctrl/gpio@ffac0000           U/pinctrl/gpio@ffad0000        clock-xin32k              fixed-clock          [             h            xxin32k        clock-xin24m              fixed-clock          [             hn6          xxin24m        cpus                         +       cpu@0            cpu           arm,cortex-a53                            psci                                                                                     cpu@1            cpu           arm,cortex-a53                           psci                                                                                     cpu@2            cpu           arm,cortex-a53                           psci                                                                                     cpu@3            cpu           arm,cortex-a53                           psci                                                                                     idle-states         psci       cpu-sleep             arm,idle-state                   #           :   x        K           [                          opp-table-cpu0            operating-points-v2          l               opp-408000000           w    Q         ~   0          @               opp-600000000           w    #F         ~   0          @      opp-816000000           w    0,         ~   0          @      opp-1008000000          w    <         ~ P P 0          @      opp-1200000000          w    G         ~ H H 0          @      opp-1416000000          w    Tfr         ~ B@ B@ 0          @      opp-1608000000                       w    _"         ~ Լ Լ 0          @      opp-1800000000          w    kI         ~ * * 0          @      opp-2016000000          w    x)         ~ 0 0 0          @         opp-table-gpu             operating-points-v2             2   opp-300000000           w             ~   B@      opp-400000000           w    ׄ         ~   B@      opp-500000000           w    e         ~   B@      opp-600000000           w    #F         ~   B@      opp-700000000           w    )'         ~   B@      opp-800000000           w    /         ~ ~ ~ B@      opp-900000000           w    5         ~ B@ B@ B@         arm-pmu           arm,cortex-a53-pmu        0                                                                    firmware       scmi              arm,scmi-smc               	        ނ                       +       protocol@14                      [                           pinctrl           rockchip,rk3562-pinctrl            
                     +                           gpio@ff260000             rockchip,gpio-bank               &                                                                                                .           :                     gpio@ff620000             rockchip,gpio-bank               b                                                                                                .           :         gpio@ff630000             rockchip,gpio-bank               c                                                       @                                       .           :         gpio@ffac0000             rockchip,gpio-bank                                       T      &                           `                                       .           :                     gpio@ffad0000             rockchip,gpio-bank                                       U      '                                                                  .           :               ]      pcfg-pull-up             K                  pcfg-pull-none           X                  pcfg-pull-none-drv-level-1           X        e                     pcfg-pull-none-drv-level-3           X        e                     pcfg-pull-none-drv-level-4           X        e                     pcfg-pull-up-drv-level-2             K        e                     pcfg-pull-none-smt           X         t                  pcfg-output-low                            cam       can0          can1          clk       clk0          clk1          cpu       dsm       emmc          eth       fspi          gpu       i2c0       i2c0-xfer                   	             
                           i2c1       i2c1m0-xfer                                                T         i2c2       i2c2m0-xfer                                                U         i2c3       i2c3m0-xfer                                               V         i2c4       i2c4m0-xfer                                              W         i2c5       i2c5m0-xfer                                              X         i2s0          i2s1          i2s2          isp       jtag          npu       pcie20        pdm       pmic       pmic-int                                               pmu       pwm0       pwm0m0-pins                                  "         pwm1       pwm1m0-pins                                  #         pwm2       pwm2m0-pins                                  $         pwm3       pwm3m0-pins                                  %         pwm4       pwm4m0-pins                                  ;         pwm5       pwm5m0-pins                                  <         pwm6       pwm6m0-pins                                  =         pwm7       pwm7m0-pins                                  >         pwm8       pwm8m0-pins                                 ?         pwm9       pwm9m0-pins                                 @         pwm10      pwm10m0-pins                                    A         pwm11      pwm11m0-pins                                    B         pwm12      pwm12m0-pins                                    C         pwm13      pwm13m0-pins                                    D         pwm14      pwm14m0-pins                                    E         pwm15      pwm15m0-pins                                    F         pwr       ref       rgmii         rmii          sdmmc0     sdmmc0-bus4       @                                                              J      sdmmc0-clk                                  K      sdmmc0-cmd                                  L      sdmmc0-det                                   M         sdmmc1     sdmmc1-bus4       @                                                              Q      sdmmc1-clk                                  S      sdmmc1-cmd                                  R         spdif         spi0       spi0m0-pins       0                                                     !      spi0m0-csn0                                        spi0m0-csn1                                            spi1       spi1m0-pins       0                                                  5      spi1m0-csn0                                 3      spi1m0-csn1                                  4         spi2       spi2m0-pins       0                                                  8      spi2m0-csn0                                 6      spi2m0-csn1                                 7         tsadc         uart0         uart1      uart1m0-xfer                                                 9      uart1m0-ctsn                                    :         uart2         uart3         uart4         uart5         uart6         uart7         uart8         uart9         vo        sdio-pwrseq    wifi-enable-h                                     [         usb    usb-host-pwren                                   _      usb-otg-pwren                                     `            psci              arm,psci-1.0             smc       reserved-memory                      +               shmem@10f000              arm,scmi-shmem                                             	         timer             arm,armv8-timer       0                                
        soc           simple-bus                       +               pcie@fe000000         *    rockchip,rk3562-pcie rockchip,rk3568-pcie         0               @      P                               dbi apb config                       (                  	     
           $  aclk_mst aclk_slv aclk_dbi pclk aux          pci       H                                                                      sys pmc msg legacy err msi          :                                `                                                                                                                                 )           6           E           O            	  Tpcie-phy            ^            T                                                                    @           l      M        spipe                         +           okay                                    legacy-interrupt-controller                               :                                                      interrupt-controller@fe901000             arm,gic-400         :                               @                                 @             `                       	                    qos@fee03800              rockchip,rk3562-qos syscon               8               qos@fee10000              rockchip,rk3562-qos syscon                               qos@fee10100              rockchip,rk3562-qos syscon                              qos@fee10200              rockchip,rk3562-qos syscon                              qos@fee10300              rockchip,rk3562-qos syscon                              qos@fee10400              rockchip,rk3562-qos syscon                              qos@fee20000              rockchip,rk3562-qos syscon                               qos@fee30000              rockchip,rk3562-qos syscon                                     &      qos@fee40000              rockchip,rk3562-qos syscon                                     '      qos@fee50000              rockchip,rk3562-qos syscon                                     (      qos@fee60000              rockchip,rk3562-qos syscon                                     +      qos@fee70000              rockchip,rk3562-qos syscon                                     )      qos@fee70100              rockchip,rk3562-qos syscon                                    *      qos@fee80000              rockchip,rk3562-qos syscon                                     ,      qos@fee90000              rockchip,rk3562-qos syscon                                     /      qos@fee90100              rockchip,rk3562-qos syscon                                    -      qos@fee90200              rockchip,rk3562-qos syscon                                    .      qos@feea0000              rockchip,rk3562-qos syscon                                     0      qos@feea0100              rockchip,rk3562-qos syscon                                    1      qos@feeb0000              rockchip,rk3562-qos syscon                               qos@feeb0100              rockchip,rk3562-qos syscon                              qos@feeb0200              rockchip,rk3562-qos syscon                              qos@feeb0300              rockchip,rk3562-qos syscon                              qos@feeb0400              rockchip,rk3562-qos syscon                              qos@feeb0500              rockchip,rk3562-qos syscon                              qos@feeb0600              rockchip,rk3562-qos syscon                              qos@feeb0700              rockchip,rk3562-qos syscon                              qos@feeb0800              rockchip,rk3562-qos syscon                              syscon@ff010000       *    rockchip,rk3562-pmu-grf syscon simple-mfd                            reboot-mode           syscon-reboot-mode                     RB         RB        RB        RB	         syscon@ff030000           rockchip,rk3562-sys-grf syscon                              syscon@ff040000            rockchip,rk3562-peri-grf syscon                                   H      syscon@ff060000           rockchip,rk3562-ioc-grf syscon                                    
      syscon@ff090000       "    rockchip,rk3562-usbphy-grf syscon                	               syscon@ff098000       #    rockchip,rk3562-pipephy-grf syscon               	                    I      clock-controller@ff100000             rockchip,rk3562-cru                                [                                                Fq ; :                    i2c@ff200000          (    rockchip,rk3562-i2c rockchip,rk3399-i2c                                      &     %      	  i2c pclk                              default                                 +            okay       pmic@20           rockchip,rk809                                               -  default pmic-sleep pmic-power-off pmic-reset                        )         J         [            xrk808-clkout1 rk808-clkout2         X           d           p           |                                                                      Z   regulators     DCDC_REG1                                        p          q        /         
  Fvdd_logic      regulator-state-mem          U         DCDC_REG2                                        p          q        /           Fvdd_cpu    regulator-state-mem          U         DCDC_REG3                             /           Fvcc_ddr    regulator-state-mem          n         DCDC_REG4                                        p          q        /           Fvdd_gpu    regulator-state-mem          U         LDO_REG1             *         *        Fvcc2v8_dvp     regulator-state-mem          U         LDO_REG2                                              	  Fvdda_0v9       regulator-state-mem          U         LDO_REG3                                                Fvdda0v9_pmu    regulator-state-mem          n                  LDO_REG4                               -         -        Fvccio_acodec       regulator-state-mem          U         LDO_REG5                               w@         2Z      	  Fvccio_sd                O   regulator-state-mem          U         LDO_REG6                               2Z         2Z        Fvcc3v3_pmu     regulator-state-mem          n         2Z         LDO_REG7                               w@         w@      	  Fvcca_1v8       regulator-state-mem          U         LDO_REG8                               w@         w@        Fvcca1v8_pmu    regulator-state-mem          n         w@         LDO_REG9             w@         w@        Fvcc1v8_dvp     regulator-state-mem          U         DCDC_REG5                              w@         w@        Fvcc_1v8             G   regulator-state-mem          U         SWITCH_REG1                           Fvcc_3v3    regulator-state-mem          U         SWITCH_REG2                         
  Fvcc3v3_sd               N   regulator-state-mem          U                  serial@ff210000       &    rockchip,rk3562-uart snps,dw-apb-uart                !                                         +     '        baudclk apb_pclk                                  okay          spi@ff220000          (    rockchip,rk3562-spi rockchip,rk3066-spi              "                        4                 -     ,        spiclk apb_pclk                             tx rx                      default                   !                     +          	  disabled          pwm@ff230000          (    rockchip,rk3562-pwm rockchip,rk3328-pwm              #                       0     /      	  pwm pclk            default            "                 	  disabled          pwm@ff230010          (    rockchip,rk3562-pwm rockchip,rk3328-pwm              #                      0     /      	  pwm pclk            default            #                 	  disabled          pwm@ff230020          (    rockchip,rk3562-pwm rockchip,rk3328-pwm              #                       0     /      	  pwm pclk            default            $                 	  disabled          pwm@ff230030          (    rockchip,rk3562-pwm rockchip,rk3328-pwm              # 0                     0     /      	  pwm pclk            default            %                 	  disabled          power-management@ff258000         &    rockchip,rk3562-pmu syscon simple-mfd                %           power-controller          !    rockchip,rk3562-power-controller                                    +                   power-domain@8                         &                  power-domain@7                         '                  power-domain@11                        (                  power-domain@12                        )   *                                +       power-domain@10             
           +                     power-domain@13                        ,                                +       power-domain@14                        -   .   /                     power-domain@15                        0   1                        gpu@ff320000          &    rockchip,rk3562-mali arm,mali-bifrost                2        @                	      k      i        clk_gpu clk_gpu_brg aclk_gpu               4      $         L          M          K           job mmu gpu             2        ^                        	  disabled          spi@ff640000              rockchip,rk3066-spi              d                        5                                spiclk apb_pclk                             tx rx                      default            3   4   5                     +          	  disabled          spi@ff650000              rockchip,rk3066-spi              e                        6                                spiclk apb_pclk                             tx rx                      default            6   7   8                     +          	  disabled          serial@ff670000       &    rockchip,rk3562-uart snps,dw-apb-uart                g                                                        baudclk apb_pclk                                  okay            default            9   :      serial@ff680000       &    rockchip,rk3562-uart snps,dw-apb-uart                h                                                         baudclk apb_pclk                                	  disabled          serial@ff690000       &    rockchip,rk3562-uart snps,dw-apb-uart                i                        !                                baudclk apb_pclk                                	  disabled          serial@ff6a0000       &    rockchip,rk3562-uart snps,dw-apb-uart                j                        "                                baudclk apb_pclk                                	  disabled          serial@ff6b0000       &    rockchip,rk3562-uart snps,dw-apb-uart                k                        #                                baudclk apb_pclk                                	  disabled          serial@ff6c0000       &    rockchip,rk3562-uart snps,dw-apb-uart                l                        $                                baudclk apb_pclk                                	  disabled          serial@ff6d0000       &    rockchip,rk3562-uart snps,dw-apb-uart                m                        %                                baudclk apb_pclk                                	  disabled          serial@ff6e0000       &    rockchip,rk3562-uart snps,dw-apb-uart                n                        &                                baudclk apb_pclk                                	  disabled          serial@ff6f0000       &    rockchip,rk3562-uart snps,dw-apb-uart                o                        '                                baudclk apb_pclk                                	  disabled          pwm@ff700000          (    rockchip,rk3562-pwm rockchip,rk3328-pwm              p                                    	  pwm pclk            default            ;                 	  disabled          pwm@ff700010          (    rockchip,rk3562-pwm rockchip,rk3328-pwm              p                                   	  pwm pclk            default            <                 	  disabled          pwm@ff700020          (    rockchip,rk3562-pwm rockchip,rk3328-pwm              p                                    	  pwm pclk            default            =                 	  disabled          pwm@ff700030          (    rockchip,rk3562-pwm rockchip,rk3328-pwm              p 0                                  	  pwm pclk            default            >                 	  disabled          pwm@ff710000          (    rockchip,rk3562-pwm rockchip,rk3328-pwm              q                                    	  pwm pclk            default            ?                 	  disabled          pwm@ff710010          (    rockchip,rk3562-pwm rockchip,rk3328-pwm              q                                   	  pwm pclk            default            @                 	  disabled          pwm@ff710020          (    rockchip,rk3562-pwm rockchip,rk3328-pwm              q                                    	  pwm pclk            default            A                 	  disabled          pwm@ff710030          (    rockchip,rk3562-pwm rockchip,rk3328-pwm              q 0                                  	  pwm pclk            default            B                 	  disabled          pwm@ff720000          (    rockchip,rk3562-pwm rockchip,rk3328-pwm              r                                    	  pwm pclk            default            C                 	  disabled          pwm@ff720010          (    rockchip,rk3562-pwm rockchip,rk3328-pwm              r                                   	  pwm pclk            default            D                 	  disabled          pwm@ff720020          (    rockchip,rk3562-pwm rockchip,rk3328-pwm              r                                    	  pwm pclk            default            E                 	  disabled          pwm@ff720030          (    rockchip,rk3562-pwm rockchip,rk3328-pwm              r 0                                  	  pwm pclk            default            F                 	  disabled          adc@ff730000              rockchip,rk3562-saradc               s                        (                                saradc apb_pclk         l             ssaradc-apb                     okay               G            Y      phy@ff750000              rockchip,rk3562-naneng-combphy               u                                  :                   ref apb pipe                 :                 l      O        sphy            H        0   I        okay                      spi@ff860000              rockchip,sfc                                                                         clk_sfc hclk_sfc                         +          	  disabled          mmc@ff870000          0    rockchip,rk3562-dwcmshc rockchip,rk3588-dwcmshc                                      ?                                       (                                         core bus axi block timer          (  l                                      score bus axi block timer            F         okay            T            ^         f         l         z                        mmc@ff880000          0    rockchip,rk3562-dw-mshc rockchip,rk3288-dw-mshc                                      8                                             biu ciu ciu-drive ciu-sample                       F         l              sreset           okay             ^                 T                                      default            J   K   L   M                    N           O      mmc@ff890000          0    rockchip,rk3562-dw-mshc rockchip,rk3288-dw-mshc                                      9                                             biu ciu ciu-drive ciu-sample                       F         l              sreset           okay             f                 T                              $         1        G   P         l        default            Q   R   S               dma-controller@ff990000           arm,pl330 arm,primecell                      @          R                     	  apb_pclk                   o          n           i                     i2c@ffa00000          (    rockchip,rk3562-i2c rockchip,rk3399-i2c                                                   	  i2c pclk                              default            T                     +          	  disabled          i2c@ffa10000          (    rockchip,rk3562-i2c rockchip,rk3399-i2c                                      !            	  i2c pclk                              default            U                     +          	  disabled          i2c@ffa20000          (    rockchip,rk3562-i2c rockchip,rk3399-i2c                                      "            	  i2c pclk                              default            V                     +          	  disabled          i2c@ffa30000          (    rockchip,rk3562-i2c rockchip,rk3399-i2c                                      #            	  i2c pclk                              default            W                     +          	  disabled          i2c@ffa40000          (    rockchip,rk3562-i2c rockchip,rk3399-i2c                                      $            	  i2c pclk                              default            X                     +          	  disabled          adc@ffaa0000              rockchip,rk3562-saradc                                       |                  D      V        saradc apb_pclk         l              ssaradc-apb                   	  disabled             chosen          tserial0:1500000n8         adc-keys          	    adc-keys               Y           buttons          w@           d   button-vol-up              s      
  volume up             Bh      button-vol-down            r        volume down          Q0      button-menu                    menu             5       button-back                    back             O         leds          
    gpio-leds      led-0                           
  heartbeat            sdio-pwrseq           mmc-pwrseq-simple               Z         
  ext_clock           default            [                                        P      regulator-vcc12v-dcin             regulator-fixed         Fvcc12v_dcin                                                   \      regulator-vcc3v3-pcie20           regulator-fixed         Fvcc3v3_pcie20            2Z         2Z                                   0          A   \                  regulator-vcc5v0-sys              regulator-fixed         Fvcc5v0_sys                             LK@         LK@        A   \            a      regulator-vcc5v0-usb              regulator-fixed         Fvcc5v0_usb                             LK@         LK@        A   \            ^      regulator-vcc5v0-usb-host             regulator-fixed         Fvcc5v0_usb_host                            LK@         LK@                 L   ]               A   ^        default            _      regulator-vcc5v0-usb-otg              regulator-fixed         Fvcc5v0_usb_otg           LK@         LK@                 L                  A   ^        default            `      regulator-vcc3v3-clk              regulator-fixed         Fvcc3v3_clk           2Z         2Z        A   a      regulator-vcc-sys             regulator-fixed         Fvcc3v3_sys                             2Z         2Z        A   \                     	compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 gpio4 #clock-cells clock-frequency clock-output-names device_type reg enable-method clocks cpu-idle-states operating-points-v2 #cooling-cells dynamic-power-coefficient phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend opp-supported-hw interrupts interrupt-affinity shmem arm,smc-id rockchip,grf ranges gpio-controller gpio-ranges interrupt-controller #gpio-cells #interrupt-cells bias-pull-up bias-disable drive-strength input-schmitt-enable output-low rockchip,pins no-map reg-names bus-range clock-names interrupt-names interrupt-map-mask interrupt-map linux,pci-domain max-link-speed num-ib-windows num-viewport num-ob-windows num-lanes phys phy-names power-domains resets reset-names status reset-gpios vpcie3v3-supply offset mode-normal mode-loader mode-recovery mode-bootloader #reset-cells assigned-clocks assigned-clock-rates pinctrl-names pinctrl-0 rockchip,system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-initial-mode regulator-name regulator-off-in-suspend regulator-on-in-suspend regulator-suspend-microvolt reg-shift reg-io-width dmas dma-names num-cs #pwm-cells #power-domain-cells pm_qos #io-channel-cells vref-supply #phy-cells rockchip,pipe-grf rockchip,pipe-phy-grf max-frequency bus-width no-sdio no-sd non-removable mmc-hs400-1_8v mmc-hs400-enhanced-strobe full-pwr-cycle-in-suspend fifo-depth no-mmc cap-mmc-highspeed cap-sd-highspeed disable-wp sd-uhs-sdr104 vmmc-supply vqmmc-supply cap-sdio-irq keep-power-in-suspend mmc-pwrseq arm,pl330-periph-burst #dma-cells stdout-path io-channels io-channel-names keyup-threshold-microvolt poll-interval linux,code label press-threshold-microvolt linux,default-trigger post-power-on-delay-ms enable-active-high startup-delay-us vin-supply gpio 