  u
   8  nT   (              n                                 radxa,e20c rockchip,rk3528                                   +            7Radxa E20C     aliases          =/pinctrl/gpio@ff610000           C/pinctrl/gpio@ffaf0000           I/pinctrl/gpio@ffb00000           O/pinctrl/gpio@ffb10000           U/pinctrl/gpio@ffb20000           [/soc/ethernet@ffbe0000           e/soc/i2c@ffa58000            j/soc/mmc@ffbf0000            o/soc/mmc@ffc30000            t/soc/serial@ff9f0000          cpus                         +       cpu-map    cluster0       core0            |         core1            |         core2            |         core3            |               cpu@0             arm,cortex-a53                        cpu          psci                                                             cpu@1             arm,cortex-a53                       cpu          psci                                                             cpu@2             arm,cortex-a53                       cpu          psci                                                             cpu@3             arm,cortex-a53                       cpu          psci                                                                firmware       scmi              arm,scmi-smc             ̂              	                     +       protocol@14                                                 opp-table-cpu             operating-points-v2                          opp-1200000000               G           Y Y         
  @      opp-1416000000               Tfr           H H         
  @      opp-1608000000               _"                     
  @      opp-1800000000               kI           Լ Լ         
  @      opp-2016000000               x)                     
  @         opp-table-gpu             operating-points-v2             ,   opp-300000000                           Y Y B@               opp-500000000                e           Y Y B@      opp-600000000                #F           Y Y B@      opp-700000000                )'             B@      opp-800000000                /           ~ ~ B@         pinctrl           rockchip,rk3528-pinctrl         '   
                     +            4               gpio@ff610000             rockchip,gpio-bank               a                       r     s        ;       G            F        V           b                        n                       ]      gpio@ffaf0000             rockchip,gpio-bank                                                     ;       I            F        V           b                        n                               gpio@ffb00000             rockchip,gpio-bank                                      $     %        ;       K            F        V           b          @             n                               gpio@ffb10000             rockchip,gpio-bank                                                     ;       L            F        V           b          `             n                               gpio@ffb20000             rockchip,gpio-bank                                                     ;       N            F        V           b                       n                                     J      pcfg-pull-up                               pcfg-pull-none                             pcfg-pull-none-drv-level-0                                         pcfg-pull-none-drv-level-2                                        pcfg-pull-up-drv-level-2                                          pcfg-pull-none-smt                                      arm       clk       emmc       emmc-bus8                                                                                                                       K      emmc-clk                                    L      emmc-cmd                                    M      emmc-strb                                   N         eth       fephy      fephym0-led-link                                    =      fephym0-led-spd                                 >         fspi          gpu       hdmi          hsm       i2c0          i2c1       i2c1m0-xfer                                              0         i2c2       i2c2m1-xfer                                              2         i2c3          i2c4       i2c4-xfer                                                 3         i2c5          i2c6          i2c7       i2c7-xfer                                                4         i2s0          i2s1          jtag          pcie          pdm       pmu       pwm0          pwm1       pwm1m0-pins                                 5         pwm2       pwm2m0-pins                                 6         pwm3          pwm4          pwm5          pwm6          pwm7          pwr       ref       rgmii      rgmii-miim                                               D      rgmii-rx-bus2         0                                                  F      rgmii-tx-bus2         0                                                   E      rgmii-rgmii-clk                                              G      rgmii-rgmii-bus       @                                	                              H         scr       sdio0      sdio0-bus4        @                                                               O      sdio0-clk                                   P      sdio0-cmd                                   Q         sdio1      sdio1-bus4        @                                            	                  R      sdio1-clk                                   S      sdio1-cmd                                   T         sdmmc      sdmmc-bus4        @                                                               U      sdmmc-clk                                   V      sdmmc-cmd                                   W      sdmmc-det                                   X      sdmmc-vol-ctrl-h                                     b         spdif         spi0          spi1          tsi0          tsi1          uart0      uart0m0-xfer                                                 /         uart1         uart2         uart3         uart4         uart5         uart6         uart7         ethernet       gmac1-rstn-l                                     I         gpio-keys      user-key                                       \         leds       lan-led-g                                    ^      sys-led-g                                    _      wan-led-g                                    `            psci              arm,psci-1.0 arm,psci-0.2            smc       reserved-memory                      +            4   shmem@10f000              arm,scmi-shmem                                             	         timer             arm,armv8-timer       0  ;                              
        clock-xin24m              fixed-clock         n6         xin24m                                 clock-gmac50m             fixed-clock                 gmac0                                  soc           simple-bus          4                                          +      interrupt-controller@fed01000             arm,gic-400       @                                 @             `                 ;      	           n                                          qos@ff200000              rockchip,rk3528-qos syscon                                qos@ff200080              rockchip,rk3528-qos syscon                               qos@ff200100              rockchip,rk3528-qos syscon                               qos@ff200200              rockchip,rk3528-qos syscon                               qos@ff200280              rockchip,rk3528-qos syscon                              qos@ff200300              rockchip,rk3528-qos syscon                               qos@ff200380              rockchip,rk3528-qos syscon                              qos@ff210000              rockchip,rk3528-qos syscon               !                qos@ff210080              rockchip,rk3528-qos syscon               !               qos@ff220000              rockchip,rk3528-qos syscon               "                            qos@ff220080              rockchip,rk3528-qos syscon               "                           qos@ff240000              rockchip,rk3528-qos syscon               $                qos@ff250000              rockchip,rk3528-qos syscon               %                            qos@ff260000              rockchip,rk3528-qos syscon               &                            qos@ff270000              rockchip,rk3528-qos syscon               '                            qos@ff270080              rockchip,rk3528-qos syscon               '                           qos@ff270100              rockchip,rk3528-qos syscon               '                           qos@ff270200              rockchip,rk3528-qos syscon               '                           qos@ff270280              rockchip,rk3528-qos syscon               '                          qos@ff270300              rockchip,rk3528-qos syscon               '                           qos@ff270380              rockchip,rk3528-qos syscon               '                           qos@ff270480              rockchip,rk3528-qos syscon               '                    !      qos@ff270500              rockchip,rk3528-qos syscon               '                     "      qos@ff280000              rockchip,rk3528-qos syscon               (                      #      qos@ff280080              rockchip,rk3528-qos syscon               (                     $      qos@ff280100              rockchip,rk3528-qos syscon               (                     %      qos@ff280180              rockchip,rk3528-qos syscon               (                    &      qos@ff280200              rockchip,rk3528-qos syscon               (                     '      qos@ff280280              rockchip,rk3528-qos syscon               (                    (      qos@ff280300              rockchip,rk3528-qos syscon               (                     )      qos@ff280380              rockchip,rk3528-qos syscon               (                    *      qos@ff280400              rockchip,rk3528-qos syscon               (                     +      syscon@ff340000           rockchip,rk3528-vpu-grf syscon               4                     ?      syscon@ff348000       $    rockchip,rk3528-pipe-phy-grf syscon              4                    Z      syscon@ff360000           rockchip,rk3528-vo-grf syscon                6                     9      clock-controller@ff4a0000             rockchip,rk3528-cru              J                      t                                                      	      
                              z      y            L      L  (   Fq ; ;] Q 沀e  р  C ׄ #F  sY@e                        =xin24m gmac0                        I                     syscon@ff540000           rockchip,rk3528-ioc-grf syscon               T                     
      power-management@ff600000         &    rockchip,rk3528-pmu syscon simple-mfd                `             power-controller          !    rockchip,rk3528-power-controller            V                        +                   power-domain@4                                           j              V          power-domain@5                      j           V          	  qdisabled          power-domain@6                      j           V          power-domain@7                    $  j                         !   "        V          power-domain@8                    $  j   #   $   %   &   '   (   )   *   +        V                gpu@ff700000          "    rockchip,rk3528-mali arm,mali-450                p                                     (@                            	  =bus core          T  ;       X          Y          V          \          ]          Z          [         "  xgp gpmmu pp pp0 ppmmu0 pp1 ppmmu1               ,                            w        qokay               -      spi@ff9c0000          (    rockchip,rk3528-spi rockchip,rk3066-spi                                                    =spiclk apb_pclk         ;                     .      .           tx rx                                      +          	  qdisabled          spi@ff9d0000          (    rockchip,rk3528-spi rockchip,rk3066-spi                                                    =spiclk apb_pclk         ;                     .      .           tx rx                                      +          	  qdisabled          serial@ff9f0000       &    rockchip,rk3528-uart snps,dw-apb-uart                                              k        =baudclk apb_pclk            ;       (              .   	   .                                 qokay            default            /      serial@ff9f8000       &    rockchip,rk3528-uart snps,dw-apb-uart                                                     =baudclk apb_pclk            ;       )              .      .   
                                          	  qdisabled          serial@ffa00000       &    rockchip,rk3528-uart snps,dw-apb-uart                                                      =baudclk apb_pclk            ;       *              .      .                                             	  qdisabled          serial@ffa08000       &    rockchip,rk3528-uart snps,dw-apb-uart                                                     =baudclk apb_pclk            ;       +              .      .                                             	  qdisabled          serial@ffa10000       &    rockchip,rk3528-uart snps,dw-apb-uart                                             1        =baudclk apb_pclk            ;       ,              .      .                                             	  qdisabled          serial@ffa18000       &    rockchip,rk3528-uart snps,dw-apb-uart                                       "              =baudclk apb_pclk            ;       -              .      .                                             	  qdisabled          serial@ffa20000       &    rockchip,rk3528-uart snps,dw-apb-uart                                        %              =baudclk apb_pclk            ;       .              .      .                                             	  qdisabled          serial@ffa28000       &    rockchip,rk3528-uart snps,dw-apb-uart                                       (              =baudclk apb_pclk            ;       /              .      .                                             	  qdisabled          i2c@ffa50000          (    rockchip,rk3528-i2c rockchip,rk3399-i2c                                                  	  =i2c pclk            ;       =                                      +          	  qdisabled          i2c@ffa58000          (    rockchip,rk3528-i2c rockchip,rk3399-i2c                                                 	  =i2c pclk            ;       >                                      +            qokay            default            0   eeprom@50             belling,bl24c16a atmel,24c16                P                               1         i2c@ffa60000          (    rockchip,rk3528-i2c rockchip,rk3399-i2c                                     j     i      	  =i2c pclk            ;       ?           default            2                     +          	  qdisabled          i2c@ffa68000          (    rockchip,rk3528-i2c rockchip,rk3399-i2c                                                 	  =i2c pclk            ;       @                                      +          	  qdisabled          i2c@ffa70000          (    rockchip,rk3528-i2c rockchip,rk3399-i2c                                     3     2      	  =i2c pclk            ;       A           default            3                                   +          	  qdisabled          i2c@ffa78000          (    rockchip,rk3528-i2c rockchip,rk3399-i2c                                                 	  =i2c pclk            ;       B                                      +          	  qdisabled          i2c@ffa80000          (    rockchip,rk3528-i2c rockchip,rk3399-i2c                                                  	  =i2c pclk            ;       C                                      +          	  qdisabled          i2c@ffa88000          (    rockchip,rk3528-i2c rockchip,rk3399-i2c                                    5     4      	  =i2c pclk            ;       D           default            4                                   +          	  qdisabled          pwm@ffa90000          (    rockchip,rk3528-pwm rockchip,rk3328-pwm                                      o      n      	  =pwm pclk                     	  qdisabled          pwm@ffa90010          (    rockchip,rk3528-pwm rockchip,rk3328-pwm                                     o      n      	  =pwm pclk                       qokay            default            5            c      pwm@ffa90020          (    rockchip,rk3528-pwm rockchip,rk3328-pwm                                      o      n      	  =pwm pclk                       qokay            default            6            d      pwm@ffa90030          (    rockchip,rk3528-pwm rockchip,rk3328-pwm               0                      o      n      	  =pwm pclk                     	  qdisabled          pwm@ffa98000          (    rockchip,rk3528-pwm rockchip,rk3328-pwm                                     r      q      	  =pwm pclk                     	  qdisabled          pwm@ffa98010          (    rockchip,rk3528-pwm rockchip,rk3328-pwm                                    r      q      	  =pwm pclk                     	  qdisabled          pwm@ffa98020          (    rockchip,rk3528-pwm rockchip,rk3328-pwm                                     r      q      	  =pwm pclk                     	  qdisabled          pwm@ffa98030          (    rockchip,rk3528-pwm rockchip,rk3328-pwm              0                      r      q      	  =pwm pclk                     	  qdisabled          adc@ffae0000              rockchip,rk3528-saradc                                                     =saradc apb_pclk         ;                                      o        saradc-apb                     qokay                7            [      ethernet@ffbd0000         &    rockchip,rk3528-gmac snps,dwmac-4.20a                               0                                       >  =stmmaceth clk_mac_ref mac_clk_rx mac_clk_tx pclk_mac aclk_mac           ;       q          t           xmacirq eth_wake_irq         ,   8        7rmii                                      
  stmmaceth           '   9        @   :         P        a   ;        t   <               	  qdisabled       mdio              snps,dwmac-mdio                      +       ethernet-phy@2            ethernet-phy-ieee802.3-c22                            "                 default            =   >                          8         stmmac-axi-config                                                                      :      rx-queues-config                           ;   queue0           tx-queues-config                           <   queue0              ethernet@ffbe0000         &    rockchip,rk3528-gmac snps,dwmac-4.20a                                                                 (  =stmmaceth clk_mac_ref pclk_mac aclk_mac         ;       y          |           xmacirq eth_wake_irq                             a      
  stmmaceth           '   ?        @   @         P        a   A        t   B                 qokay            output          ,   C      	  7rgmii-id               1        default            D   E   F   G   H   mdio              snps,dwmac-mdio                      +       ethernet-phy@1            ethernet-phy-ieee802.3-c22                      default            I          N                   2   J                  C         stmmac-axi-config                                                                      @      rx-queues-config                           A   queue0           tx-queues-config                           B   queue0              mmc@ffbf0000          0    rockchip,rk3528-dwcmshc rockchip,rk3588-dwcmshc                                                         ( n6        (                                         =core bus axi block timer            ;                  >         default            K   L   M   N                    (        A      B      C      D      E        core bus axi block timer            qokay            L            V         h         w         }                    1           7      mmc@ffc10000          0    rockchip,rk3528-dw-mshc rockchip,rk3288-dw-mshc                      @                                         =biu ciu ciu-drive ciu-sample                       ;                  >         default            O   P   Q                            g        reset         	  qdisabled          mmc@ffc20000          0    rockchip,rk3528-dw-mshc rockchip,rk3288-dw-mshc                      @                                         =biu ciu ciu-drive ciu-sample                       ;                  >         default            R   S   T                            h        reset         	  qdisabled          mmc@ffc30000          0    rockchip,rk3528-dw-mshc rockchip,rk3288-dw-mshc                      @                (     '                  =biu ciu ciu-drive ciu-sample                       ;                  >р        default            U   V   W   X                                    reset              Z        qokay            L            V                                      1           Y      dma-controller@ffd60000           arm,pl330 arm,primecell                      @                ^      	  =apb_pclk          l  ;                                                                                                               
            .      phy@ffdc0000              rockchip,rk3528-naneng-combphy                                      {        (                {                    =ref apb pipe                                c      e        phy apb         !           ,   ?        >   Z      	  qdisabled             chosen          Tserial0:1500000n8         adc-keys          	    adc-keys            `   [            lbuttons         } w@           d   button-maskrom          MASKROM                                 gpio-keys         
    gpio-keys           default            \   button-user         8   ]               USER                                leds          
    gpio-leds           default            ^   _   `   led-lan                    off         lan         8   J               netdev        led-sys                    on        
  heartbeat           8   J            
  heartbeat         led-wan                    off         wan         8   J               netdev           regulator-0v9-vdd             regulator-fixed         vdd_0v9                    4        F         ^         v   a      regulator-1v1-vcc-ddr             regulator-fixed         vcc_ddr                    4        F         ^         v   a      regulator-1v8-vcc             regulator-fixed         vcc_1v8                    4        F w@        ^ w@        v   1            7      regulator-3v3-vcc             regulator-fixed         vcc_3v3                    4        F 2Z        ^ 2Z        v   a            1      regulator-5v0-vcc-sys             regulator-fixed         vcc5v0_sys                     4        F LK@        ^ LK@            a      regulator-vccio-sd            regulator-gpio          8   J               default            b      	  vccio_sd            F w@        ^ 2Z         w@     2Z           v   a            Y      regulator-vdd-arm             pwm-regulator              c                    a        vdd_arm                    4        F b        ^ Sh                             regulator-vdd-logic           pwm-regulator              d                    a      
  vdd_logic                      4        F 
        ^ Y                       -         	compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 gpio4 ethernet0 i2c1 mmc0 mmc1 serial0 cpu reg device_type enable-method clocks operating-points-v2 cpu-supply phandle arm,smc-id shmem #clock-cells opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend rockchip,grf ranges interrupts gpio-controller #gpio-cells gpio-ranges interrupt-controller #interrupt-cells power-domains bias-pull-up bias-disable drive-strength input-schmitt-enable rockchip,pins no-map clock-frequency clock-output-names assigned-clocks assigned-clock-rates clock-names #reset-cells #power-domain-cells pm_qos status interrupt-names resets mali-supply dmas dma-names reg-io-width reg-shift pinctrl-names pinctrl-0 pagesize read-only vcc-supply #pwm-cells reset-names #io-channel-cells vref-supply phy-handle phy-mode snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso phy-is-integrated snps,blen snps,rd_osr_lmt snps,wr_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use clock_in_out phy-supply reset-assert-us reset-deassert-us reset-gpios max-frequency bus-width cap-mmc-highspeed mmc-hs200-1_8v no-sd no-sdio non-removable vmmc-supply vqmmc-supply fifo-depth rockchip,default-sample-phase cap-sd-highspeed disable-wp sd-uhs-sdr104 #dma-cells arm,pl330-periph-burst #phy-cells rockchip,pipe-grf rockchip,pipe-phy-grf stdout-path io-channels io-channel-names keyup-threshold-microvolt poll-interval label linux,code press-threshold-microvolt wakeup-source color default-state function linux,default-trigger regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt vin-supply states pwms pwm-supply regulator-settling-time-up-us 