     8  ,   (            
                               -    xunlong,orangepi-r1-plus-lts rockchip,rk3328                                     +            7Xunlong Orange Pi R1 Plus LTS      aliases          =/pinctrl/gpio@ff210000           C/pinctrl/gpio@ff220000           I/pinctrl/gpio@ff230000           O/pinctrl/gpio@ff240000           U/serial@ff110000             ]/serial@ff120000             e/serial@ff130000             m/i2c@ff150000            r/i2c@ff160000            w/i2c@ff170000            |/i2c@ff180000            /ethernet@ff540000           /usb@ff600000/device@2           /mmc@ff500000         cpus                         +       cpu@0            cpu           arm,cortex-a53                                                                      x         psci                                      @        +           8           E   @        W           d           u              	      cpu@1            cpu           arm,cortex-a53                                                                     x         psci                                      @        +           8           E   @        W           d           u              
      cpu@2            cpu           arm,cortex-a53                                                                     x         psci                                      @        +           8           E   @        W           d           u                    cpu@3            cpu           arm,cortex-a53                                                                     x         psci                                      @        +           8           E   @        W           d           u                    idle-states         psci       cpu-sleep             arm,idle-state                                 x                                         l2-cache              cache                                             @        -                       opp-table-0           operating-points-v2          	              opp-408000000               Q          ~        )  @         :      opp-600000000               #F          ~        )  @      opp-816000000               0,          B@        )  @      opp-1008000000              <                  )  @      opp-1200000000              G          (        )  @      opp-1296000000              M?d                   )  @         analog-sound              simple-audio-card           Fi2s         _           yAnalog        	  disabled       simple-audio-card,cpu                    simple-audio-card,codec                     arm-pmu           arm,cortex-a53-pmu        0         d          e          f          g              	   
            display-subsystem             rockchip,display-subsystem                   	  disabled          hdmi-sound            simple-audio-card           Fi2s         _           yHDMI          	  disabled       simple-audio-card,cpu                    simple-audio-card,codec                     psci              arm,psci-1.0 arm,psci-0.2            smc       timer             arm,armv8-timer       0                                
        xin24m            fixed-clock                     n6         xin24m             E      i2s@ff000000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s                                                         )     7        i2s_clk i2s_hclk                                tx rx                     	  disabled                     i2s@ff010000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s                                                        *     8        i2s_clk i2s_hclk                                tx rx                     	  disabled                     i2s@ff020000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s                                                        +     9        i2s_clk i2s_hclk                                 tx rx                     	  disabled          spdif@ff030000            rockchip,rk3328-spdif                                                          .     :      
  mclk hclk                 
        tx          !default         /                     	  disabled          pdm@ff040000              rockchip,pdm                                         =     R        pdm_clk pdm_hclk                          rx          !default sleep           /                       9                     	  disabled          syscon@ff100000       &    rockchip,rk3328-grf syscon simple-mfd                                    C   io-domains        "    rockchip,rk3328-io-voltage-domain           okay            C           P           ^           l           z                               gpio              rockchip,rk3328-grf-gpio                              power-controller          !    rockchip,rk3328-power-controller                                    +               :   power-domain@1                                               power-domain@6                             D                  power-domain@5                                   B      A      B                  power-domain@8                                  F                     reboot-mode           syscon-reboot-mode                    RB         RB        RB	        RB         serial@ff110000       &    rockchip,rk3328-uart snps,dw-apb-uart                                        7                  &              baudclk apb_pclk                                tx rx           !default         /                                      	  disabled          serial@ff120000       &    rockchip,rk3328-uart snps,dw-apb-uart                                        8                  '              baudclk apb_pclk                                tx rx           !default         /   !   "   #                            	  disabled          serial@ff130000       &    rockchip,rk3328-uart snps,dw-apb-uart                                        9                  (              baudclk apb_pclk                                tx rx           !default         /   $                              okay          i2c@ff150000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                                      $                        +                   7            	  i2c pclk            !default         /   %      	  disabled          i2c@ff160000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                                      %                        +                   8            	  i2c pclk            !default         /   &        okay       pmic@18           rockchip,rk805                          '                                 xin32k rk805-clkout2                                /   (        !default          (         @        N   )        Z   )        f   )        r   )        ~              )   regulators     DCDC_REG1           vdd_log                            
4                    0   regulator-state-mem                  ( B@         DCDC_REG2           vdd_arm                            
4                    0              regulator-state-mem                  ( ~         DCDC_REG3           vcc_ddr                      regulator-state-mem                   DCDC_REG4           vcc_io                             2Z         2Z              regulator-state-mem                  ( 2Z         LDO_REG1            vcc_18                             w@         w@   regulator-state-mem                  ( w@         LDO_REG2            vcc18_emmc                             w@         w@              regulator-state-mem                  ( w@         LDO_REG3            vdd_10                             B@         B@   regulator-state-mem                  ( B@                  i2c@ff170000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                                      &                        +                   9            	  i2c pclk            !default         /   *      	  disabled          i2c@ff180000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                                      '                        +                   :            	  i2c pclk            !default         /   +      	  disabled          spi@ff190000          (    rockchip,rk3328-spi rockchip,rk3066-spi                                      1                        +                                  spiclk apb_pclk                     	        tx rx           !default         /   ,   -   .   /        okay       flash@0           jedec,spi-nor                        D         watchdog@ff1a0000              rockchip,rk3328-wdt snps,dw-wdt                                      (                        pwm@ff1b0000              rockchip,rk3328-pwm                                      <            	  pwm pclk            !default         /   0        V         	  disabled          pwm@ff1b0010              rockchip,rk3328-pwm                                     <            	  pwm pclk            !default         /   1        V         	  disabled          pwm@ff1b0020              rockchip,rk3328-pwm                                      <            	  pwm pclk            !default         /   2        V           okay          pwm@ff1b0030              rockchip,rk3328-pwm               0                      <            	  pwm pclk            !default         /   3        V         	  disabled          dma-controller@ff1f0000           arm,pl330 arm,primecell                      @                                       a                     	  apb_pclk            x                    thermal-zones      soc-thermal                                           4       trips      trip-point0          p                   passive       trip-point1          L                   passive            5      soc-crit             s                	   critical             cooling-maps       map0               5      0     	   
                       map1               5           6                          tsadc@ff250000            rockchip,rk3328-tsadc                %                        :                 $          P               $              tsadc apb_pclk          !init default sleep          /   7        9   8        &   7        0      B      
  7tsadc-apb           C         Z           okay            p                           4      efuse@ff260000            rockchip,rk3328-efuse                &         P                     +                  >        pclk_efuse                 id@7                         cpu-leakage@17                       logic-leakage@19                         cpu-version@1a                                          F         adc@ff280000          .    rockchip,rk3328-saradc rockchip,rk3399-saradc                (                        P                             %              saradc apb_pclk         0      V        7saradc-apb        	  disabled          gpu@ff300000          "    rockchip,rk3328-mali arm,mali-450                0               T         Z          W          ]          X          Y          [          \         "  gp gpmmu pp pp0 ppmmu0 pp1 ppmmu1                              	  bus core                9           :           0      f                       6      opp-table-gpu             operating-points-v2            9   opp-200000000                         g8      opp-300000000                         g8      opp-400000000               ׄ          g8      opp-500000000               e          0      	  disabled             iommu@ff330200            rockchip,iommu               3                       `                                aclk iface                    	  disabled          iommu@ff340800            rockchip,iommu               4        @               b                       F        aclk iface                    	  disabled          video-codec@ff350000              rockchip,rk3328-vpu              5                        	           vdpu                        F      
  aclk hclk              ;           :         iommu@ff350800            rockchip,iommu               5        @                                      F        aclk iface                         :              ;      video-codec@ff360000          *    rockchip,rk3328-vdec rockchip,rk3399-vdec                6                                               B      A      B        axi ahb cabac core                      A      B        ׄ ׄ             <           :         iommu@ff360480            rockchip,iommu                6       @    6       @               J                       B        aclk iface                         :              <      vop@ff370000              rockchip,rk3328-vop              7        >                                        x     ;        aclk_vop dclk_vop hclk_vop          0                          7axi ahb dclk               =      	  disabled       port                  endpoint               >           D            iommu@ff373f00            rockchip,iommu               7?                                               ;        aclk iface                    	  disabled               =      hdmi@ff3c0000             rockchip,rk3328-dw-hdmi              <                                   #                        F              iahb isfr cec              ?        hdmi            !default         /   @   A   B           C                  	  disabled                  ports                        +       port@0                  endpoint               D           >         port@1                          codec@ff410000            rockchip,rk3328-codec                A                              *      
  pclk mclk              C                  	  disabled                     phy@ff430000              rockchip,rk3328-hdmi-phy                 C                        S                     E      y        sysclk refoclk refpclk        	  hdmi_phy                        +   F        7cpu-version         H          	  disabled               ?      clock-controller@ff440000             rockchip,rk3328-cru              D                     E        xin24m             C                   S                 x      =            &      '      (                                                      A      B      D      C      "      \      5                             H                 4                  $  `      z               E   E   E      |           n6 n6 n6     ׄ     n6 #F L  G рxhxhрxhxh                    syscon@ff450000       .    rockchip,rk3328-usb2phy-grf syscon simple-mfd                E                              +      usb2phy@100           rockchip,rk3328-usb2phy                            E        phyclk          usb480m_phy                           {        `   G        okay               G   otg-port            H          $         ;          <          =           otg-bvalid otg-id linestate         okay               T      host-port           H                   >         
  linestate           okay               U            mmc@ff500000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              P        @                                  =      !      J      N        biu ciu ciu-drive ciu-sample            w           Hр        0      m        7reset           okay                                         /   H   I   J   K        !default            L      mmc@ff510000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              Q        @                                  >      "      K      O        biu ciu ciu-drive ciu-sample            w           Hр        0      n        7reset         	  disabled          mmc@ff520000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              R        @                                  ?      #      L      P        biu ciu ciu-drive ciu-sample            w           Hр        0      o        7reset         	  disabled          ethernet@ff540000             rockchip,rk3328-gmac                 T                                   macirq        8         d      W      X      Z      Y                  M  stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac            0      c      
  7stmmaceth              C                                         okay                  d      f        `   M   M        input                      /   N        !default            O      	  rgmii-id       mdio              snps,dwmac-mdio                      +       ethernet-phy@0            ethernet-phy-ieee802.3-c22                                %sY@         D        _          }          /   P        !default           :          P           '                 O            ethernet@ff550000             rockchip,rk3328-gmac                 U                    C                          macirq        8         T      S      S      U                  V      I  stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref aclk_mac pclk_mac clk_macphy            0      b      
  7stmmaceth           rmii               Q                                         output        	  disabled       mdio              snps,dwmac-mdio                      +       ethernet-phy@0        4    ethernet-phy-id1234.d400 ethernet-phy-ieee802.3-c22                             V        0      d        !default         /   R   S                    Q            usb@ff580000          2    rockchip,rk3328-usb rockchip,rk3066-usb snps,dwc2                X                                         M        otg         host                                 	            @                  T      	  usb2-phy            okay          usb@ff5c0000              generic-ehci                 \                                         N   G           U        usb         okay          usb@ff5d0000              generic-ohci                 ]                                         N   G           U        usb         okay          mmc@ff5f0000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              _        @                                  @            M      Q        biu ciu ciu-drive ciu-sample            w           Hр        0      h        7reset         	  disabled          usb@ff600000              rockchip,rk3328-dwc3 snps,dwc3               `                        C                  `      a              ref_clk suspend_clk bus_clk         host          
  	utmi_wide            	         	>         	V         	x         	         	        okay                         +       device@2              usbbda,8153                      interrupt-controller@ff811000             arm,gic-400         	                         	      @                                 @             `                       	                   crypto@ff060000           rockchip,rk3328-crypto                       @                                 P     Q      ;        hclk_master hclk_slave sclk         0      D        7crypto-rst        pinctrl           rockchip,rk3328-pinctrl            C                     +            	   gpio@ff210000             rockchip,gpio-bank               !                        3                                               	        	              f      gpio@ff220000             rockchip,gpio-bank               "                        4                                               	        	              '      gpio@ff230000             rockchip,gpio-bank               #                        5                                               	        	              d      gpio@ff240000             rockchip,gpio-bank               $                        6                                               	        	              e      pcfg-pull-up             	           X      pcfg-pull-down           
           `      pcfg-pull-none           
           V      pcfg-pull-none-2ma           
        
!              _      pcfg-pull-up-2ma             	        
!         pcfg-pull-up-4ma             	        
!              Y      pcfg-pull-none-4ma           
        
!              \      pcfg-pull-down-4ma           
        
!         pcfg-pull-none-8ma           
        
!              Z      pcfg-pull-up-8ma             	        
!              [      pcfg-pull-none-12ma          
        
!              ]      pcfg-pull-up-12ma            	        
!              ^      pcfg-output-high             
0      pcfg-output-low          
<      pcfg-input-high          	         
G           W      pcfg-input           
G      i2c0       i2c0-xfer            
T            V            V           %         i2c1       i2c1-xfer            
T            V            V           &         i2c2       i2c2-xfer            
T            V            V           *         i2c3       i2c3-xfer            
T             V             V           +      i2c3-pins            
T              V              V         hdmi_i2c       hdmii2c-xfer             
T             V             V           A         pdm-0      pdmm0-clk           
T            V                 pdmm0-fsync         
T            V      pdmm0-sdi0          
T            V                 pdmm0-sdi1          
T            V                 pdmm0-sdi2          
T            V                 pdmm0-sdi3          
T            V                 pdmm0-clk-sleep         
T             W                 pdmm0-sdi0-sleep            
T             W                 pdmm0-sdi1-sleep            
T             W                 pdmm0-sdi2-sleep            
T             W                 pdmm0-sdi3-sleep            
T             W                 pdmm0-fsync-sleep           
T             W         tsadc      otp-pin         
T             V           7      otp-out         
T            V           8         uart0      uart0-xfer           
T      	      V            X                 uart0-cts           
T            V                 uart0-rts           
T      
      V                  uart0-rts-pin           
T      
       V         uart1      uart1-xfer           
T            V            X           !      uart1-cts           
T            V           "      uart1-rts           
T            V           #      uart1-rts-pin           
T             V         uart2-0    uart2m0-xfer             
T             V            X         uart2-1    uart2m1-xfer             
T             V            X           $         spi0-0     spi0m0-clk          
T            X      spi0m0-cs0          
T            X      spi0m0-tx           
T      	      X      spi0m0-rx           
T      
      X      spi0m0-cs1          
T            X         spi0-1     spi0m1-clk          
T            X      spi0m1-cs0          
T            X      spi0m1-tx           
T            X      spi0m1-rx           
T            X      spi0m1-cs1          
T            X         spi0-2     spi0m2-clk          
T             X           ,      spi0m2-cs0          
T            X           /      spi0m2-tx           
T            X           -      spi0m2-rx           
T            X           .         i2s1       i2s1-mclk           
T            V      i2s1-sclk           
T            V      i2s1-lrckrx         
T            V      i2s1-lrcktx         
T            V      i2s1-sdi            
T            V      i2s1-sdo            
T            V      i2s1-sdio1          
T            V      i2s1-sdio2          
T            V      i2s1-sdio3          
T            V      i2s1-sleep          
T             W             W             W             W             W             W             W             W             W         i2s2-0     i2s2m0-mclk         
T            V      i2s2m0-sclk         
T            V      i2s2m0-lrckrx           
T            V      i2s2m0-lrcktx           
T            V      i2s2m0-sdi          
T            V      i2s2m0-sdo          
T            V      i2s2m0-sleep          `  
T             W             W             W             W             W             W         i2s2-1     i2s2m1-mclk         
T            V      i2s2m1-sclk         
T             V      i2sm1-lrckrx            
T            V      i2s2m1-lrcktx           
T            V      i2s2m1-sdi          
T            V      i2s2m1-sdo          
T            V      i2s2m1-sleep          P  
T             W              W             W             W             W         spdif-0    spdifm0-tx          
T             V         spdif-1    spdifm1-tx          
T            V         spdif-2    spdifm2-tx          
T             V                    sdmmc0-0       sdmmc0m0-pwren          
T            Y      sdmmc0m0-pin            
T             Y         sdmmc0-1       sdmmc0m1-pwren          
T             Y      sdmmc0m1-pin            
T              Y           g         sdmmc0     sdmmc0-clk          
T            Z           H      sdmmc0-cmd          
T            [           I      sdmmc0-dectn            
T            Y           J      sdmmc0-wrprt            
T            Y      sdmmc0-bus1         
T             [      sdmmc0-bus4       @  
T             [            [            [            [           K      sdmmc0-pins         
T             Y             Y             Y             Y             Y             Y             Y              Y         sdmmc0ext      sdmmc0ext-clk           
T            \      sdmmc0ext-cmd           
T             Y      sdmmc0ext-wrprt         
T            Y      sdmmc0ext-dectn         
T            Y      sdmmc0ext-bus1          
T            Y      sdmmc0ext-bus4        @  
T            Y            Y            Y            Y      sdmmc0ext-pins          
T              Y             Y             Y             Y             Y             Y             Y             Y         sdmmc1     sdmmc1-clk          
T            Z      sdmmc1-cmd          
T            [      sdmmc1-pwren            
T            [      sdmmc1-wrprt            
T            [      sdmmc1-dectn            
T            [      sdmmc1-bus1         
T            [      sdmmc1-bus4       @  
T            [            [            [            [      sdmmc1-pins         
T             Y             Y             Y             Y             Y             Y             Y             Y             Y         emmc       emmc-clk            
T            ]      emmc-cmd            
T            ^      emmc-pwren          
T            V      emmc-rstnout            
T            V      emmc-bus1           
T             ^      emmc-bus4         @  
T             ^            ^            ^            ^      emmc-bus8           
T             ^            ^            ^            ^            ^            ^            ^            ^         pwm0       pwm0-pin            
T            V           0         pwm1       pwm1-pin            
T            V           1         pwm2       pwm2-pin            
T            V           2         pwmir      pwmir-pin           
T            V           3         gmac-1     rgmiim1-pins         `  
T            Z            \            \            Z            \            \            \      
      \            \            Z      	      Z            \            \            Z            Z             Z             Z             \             Z             Z             Z             Z           N      rmiim1-pins         
T            _            ]            _            _            _            _      
      _            _            ]      	      ]             V             V             V             V             V             V         gmac2phy       fephyled-speed10            
T             V      fephyled-duplex         
T             V      fephyled-rxm1           
T            V           R      fephyled-txm1           
T            V      fephyled-linkm1         
T            V           S         tsadc_pin      tsadc-int           
T            V      tsadc-pin           
T             V         hdmi_pin       hdmi-cec            
T             V           @      hdmi-hpd            
T             `           B         cif-0      dvp-d2d9-m0         
T            V            V            V            V            V      	      V      
      V            V            V             V            V            V         cif-1      dvp-d2d9-m1         
T            V            V            V            V            V            V            V            V            V             V            V            V         gmac2io    eth-phy-reset-pin           
T             `           P         leds       lan-led-pin         
T             V           a      sys-led-pin         
T             V           b      wan-led-pin         
T             V           c         lan    lan-vdd-pin         
T             V           h         pmic       pmic-int-l          
T             X           (            chosen          
bserial2:1500000n8         gmac-clock            fixed-clock         sY@        gmac_clkin                         M      leds          
    gpio-leds           /   a   b   c        !default    led-0           
nlan         
w              d             led-1           
nstatus          
w              e             
  
}heartbeat         led-2           
nwan         
w              d                regulator-sdmmc           regulator-fixed         
   f              /   g        !default         vcc_sd                   
              L      regulator-vcc-sys             regulator-fixed         vcc_sys                            LK@         LK@           )      regulator-vdd-5v-lan              regulator-fixed          
        
   d               /   h        !default         vdd_5v_lan                            
   )         	compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 serial0 serial1 serial2 i2c0 i2c1 i2c2 i2c3 ethernet0 ethernet1 mmc0 device_type reg clocks #cooling-cells cpu-idle-states dynamic-power-coefficient enable-method operating-points-v2 i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us cache-level cache-unified opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend simple-audio-card,format simple-audio-card,mclk-fs simple-audio-card,name status sound-dai interrupts interrupt-affinity ports #clock-cells clock-frequency clock-output-names clock-names dmas dma-names #sound-dai-cells pinctrl-names pinctrl-0 pinctrl-1 pmuio-supply vccio1-supply vccio2-supply vccio3-supply vccio4-supply vccio5-supply vccio6-supply gpio-controller #gpio-cells #power-domain-cells offset mode-normal mode-recovery mode-bootloader mode-loader reg-io-width reg-shift system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-on-in-suspend regulator-suspend-microvolt spi-max-frequency #pwm-cells arm,pl330-periph-burst #dma-cells polling-delay-passive polling-delay sustainable-power thermal-sensors temperature hysteresis trip cooling-device contribution assigned-clocks assigned-clock-rates pinctrl-2 resets reset-names rockchip,hw-tshut-temp #thermal-sensor-cells rockchip,hw-tshut-mode rockchip,hw-tshut-polarity rockchip,efuse-size bits #io-channel-cells interrupt-names power-domains #iommu-cells iommus remote-endpoint phys phy-names rockchip,grf nvmem-cells nvmem-cell-names #phy-cells #reset-cells assigned-clock-parents fifo-depth bus-width cap-sd-highspeed disable-wp vmmc-supply tx-fifo-depth rx-fifo-depth snps,txpbl clock_in_out phy-supply phy-handle phy-mode motorcomm,auto-sleep-disabled motorcomm,clk-out-frequency-hz motorcomm,keep-pll-enabled motorcomm,rx-clk-drv-microamp motorcomm,rx-data-drv-microamp reset-assert-us reset-deassert-us reset-gpios phy-is-integrated dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size phy_type snps,dis-del-phy-power-chg-quirk snps,dis_enblslpm_quirk snps,dis-tx-ipgap-linecheck-quirk snps,dis-u2-freeclk-exists-quirk snps,dis_u2_susphy_quirk snps,dis_u3_susphy_quirk #interrupt-cells interrupt-controller ranges bias-pull-up bias-pull-down bias-disable drive-strength output-high output-low input-enable rockchip,pins stdout-path function color linux,default-trigger gpio vin-supply enable-active-high 