     8  ~$   (              }                             1    sakurapi,rk3308-sakurapi-rk3308b rockchip,rk3308                                     +            7Sakura Pi RK3308B      aliases          =/pinctrl/gpio@ff220000           C/pinctrl/gpio@ff230000           I/pinctrl/gpio@ff240000           O/pinctrl/gpio@ff250000           U/pinctrl/gpio@ff260000           [/i2c@ff040000            `/i2c@ff050000            e/i2c@ff060000            j/i2c@ff070000            o/serial@ff0a0000             w/serial@ff0b0000             /serial@ff0c0000             /serial@ff0d0000             /serial@ff0e0000             /spi@ff120000            /spi@ff130000            /spi@ff140000            /mmc@ff490000            /mmc@ff480000            /mmc@ff4a0000         cpus                         +       cpu@0            cpu           arm,cortex-a35                            psci                                           Z                              '           8           C         cpu@1            cpu           arm,cortex-a35                           psci                                  '           C         cpu@2            cpu           arm,cortex-a35                           psci                                  '           C   	      cpu@3            cpu           arm,cortex-a35                           psci                                  '           C   
      idle-states         Kpsci       cpu-sleep             arm,idle-state           X        i              x                             C            l2-cache              cache                               C            opp-table-0           operating-points-v2                  C      opp-408000000               Q          ~ ~ r`          @               opp-600000000               #F          ~ ~ r`          @      opp-816000000               0,            r`          @      opp-1008000000              <          * * r`          @         arm-pmu           arm,cortex-a35-pmu        0  	       S          T          U          V                    	   
      external-mac-clock            fixed-clock         '      
  7mac_clkin           J          psci              arm,psci-1.0             smc       timer             arm,armv8-timer       0  	                              
        xin24m            fixed-clock         J            'n6         7xin24m          C   X      grf@ff000000          &    rockchip,rk3308-grf syscon simple-mfd                                  C   :   io-domains        "    rockchip,rk3308-io-voltage-domain         	  Wdisabled          reboot-mode           syscon-reboot-mode          ^           eRB        uRB        RB         RB        RB	         syscon@ff008000       .    rockchip,rk3308-usb2phy-grf syscon simple-mfd                        @                      +      usb2phy@100           rockchip,rk3308-usb2phy                                                        H        phyclk          7usb480m_phy         J            Wokay            C      otg-port          $  	       C          D          E           otg-bvalid otg-id linestate                     Wokay            C   @      host-port           	       J         
  linestate                       Wokay            C   A            syscon@ff00b000       -    rockchip,rk3308-detect-grf syscon simple-mfd                                               +         syscon@ff00c000       +    rockchip,rk3308-core-grf syscon simple-mfd                                             +         i2c@ff040000          (    rockchip,rk3308-i2c rockchip,rk3399-i2c                                                  	  i2c pclk            	                  default                                 +          	  Wdisabled          i2c@ff050000          (    rockchip,rk3308-i2c rockchip,rk3399-i2c                                                  	  i2c pclk            	                  default                                 +            Wokay          i2c@ff060000          (    rockchip,rk3308-i2c rockchip,rk3399-i2c                                                  	  i2c pclk            	                  default                                 +          	  Wdisabled          i2c@ff070000          (    rockchip,rk3308-i2c rockchip,rk3399-i2c                                                  	  i2c pclk            	                  default                                 +          	  Wdisabled          watchdog@ff080000              rockchip,rk3308-wdt snps,dw-wdt                                              	       
         	  Wdisabled          serial@ff0a0000       &    rockchip,rk3308-uart snps,dw-apb-uart                
                 	                                       baudclk apb_pclk                                  default                        	  Wdisabled          serial@ff0b0000       &    rockchip,rk3308-uart snps,dw-apb-uart                                 	                                       baudclk apb_pclk                                  default                        	  Wdisabled          serial@ff0c0000       &    rockchip,rk3308-uart snps,dw-apb-uart                                 	                                       baudclk apb_pclk                                  default                    Wokay          serial@ff0d0000       &    rockchip,rk3308-uart snps,dw-apb-uart                                 	                                       baudclk apb_pclk                                  default                  	  Wdisabled          serial@ff0e0000       &    rockchip,rk3308-uart snps,dw-apb-uart                                 	                                       baudclk apb_pclk                                  default                          Wokay             &   bluetooth             brcm,bcm4345c5                         lpo         default                          6                  J      
            \                  k `         spi@ff120000          (    rockchip,rk3308-spi rockchip,rk3066-spi                               	                               +                                 spiclk apb_pclk         u                     ztx rx           default                !   "   #      	  Wdisabled          spi@ff130000          (    rockchip,rk3308-spi rockchip,rk3066-spi                               	                               +                                 spiclk apb_pclk         u                    ztx rx           default            $   %   &   '      	  Wdisabled          spi@ff140000          (    rockchip,rk3308-spi rockchip,rk3066-spi                               	                               +                                 spiclk apb_pclk         u   (      (           ztx rx           default            )   *   +   ,      	  Wdisabled          pwm@ff160000          (    rockchip,rk3308-pwm rockchip,rk3328-pwm                                      y            	  pwm pclk            default            -                 	  Wdisabled          pwm@ff160010          (    rockchip,rk3308-pwm rockchip,rk3328-pwm                                     y            	  pwm pclk            default            .                 	  Wdisabled          pwm@ff160020          (    rockchip,rk3308-pwm rockchip,rk3328-pwm                                      y            	  pwm pclk            default            /                 	  Wdisabled          pwm@ff160030          (    rockchip,rk3308-pwm rockchip,rk3328-pwm               0                      y            	  pwm pclk            default            0                 	  Wdisabled          pwm@ff170000          (    rockchip,rk3308-pwm rockchip,rk3328-pwm                                      x            	  pwm pclk            default            1                 	  Wdisabled          pwm@ff170010          (    rockchip,rk3308-pwm rockchip,rk3328-pwm                                     x            	  pwm pclk            default            2                 	  Wdisabled          pwm@ff170020          (    rockchip,rk3308-pwm rockchip,rk3328-pwm                                      x            	  pwm pclk            default            3                 	  Wdisabled          pwm@ff170030          (    rockchip,rk3308-pwm rockchip,rk3328-pwm               0                      x            	  pwm pclk            default            4                 	  Wdisabled          pwm@ff180000          (    rockchip,rk3308-pwm rockchip,rk3328-pwm                                                  	  pwm pclk            default            5                   Wokay            C   d      pwm@ff180010          (    rockchip,rk3308-pwm rockchip,rk3328-pwm                                                 	  pwm pclk            default            6                 	  Wdisabled          pwm@ff180020          (    rockchip,rk3308-pwm rockchip,rk3328-pwm                                                  	  pwm pclk            default            7                 	  Wdisabled          pwm@ff180030          (    rockchip,rk3308-pwm rockchip,rk3328-pwm               0                                  	  pwm pclk            default            8                   Wokay          rktimer@ff1a0000              rockchip,rk3288-timer                                  	                                       pclk timer        saradc@ff1e0000       .    rockchip,rk3308-saradc rockchip,rk3399-saradc                                 	       %                  %              saradc apb_pclk                          F        saradc-apb          Wokay               9      efuse@ff210000            rockchip,rk3308-otp              !        @                      +                  '                    otp apb_pclk phy                  T        phy    id@7                         cpu-leakage@17                       logic-leakage@18                            dma-controller@ff2c0000           arm,pl330 arm,primecell              ,        @         	                                                   	  apb_pclk                       C         dma-controller@ff2d0000           arm,pl330 arm,primecell              -        @         	                                                  	  apb_pclk                       C   (      i2s@ff320000              rockchip,rk3308-i2s-tdm              2                 	       2           mclk_tx mclk_rx hclk                   T      V              u   (      (           zrx tx                             
  tx-m rx-m              :      	  Wdisabled          i2s@ff330000              rockchip,rk3308-i2s-tdm              3                 	       3           mclk_tx mclk_rx hclk                   X      Z              u   (           zrx                            
  tx-m rx-m              :      	  Wdisabled          i2s@ff350000          (    rockchip,rk3308-i2s rockchip,rk3066-i2s              5                 	       4                  \              i2s_clk i2s_hclk            u   (      (   	        ztx rx                               reset-m reset-h         default            ;   <   =   >      	  Wdisabled          i2s@ff360000          (    rockchip,rk3308-i2s rockchip,rk3066-i2s              6                 	       5                  ^              i2s_clk i2s_hclk            u   (           zrx                              reset-m reset-h       	  Wdisabled          spdif-tx@ff3a0000         ,    rockchip,rk3308-spdif rockchip,rk3066-spdif              :                 	       7                  b            
  mclk hclk           u   (           ztx          default            ?      	  Wdisabled          usb@ff400000          2    rockchip,rk3308-usb rockchip,rk3066-usb snps,dwc2                @                 	       B                          otg         peripheral                     	                      @               '   @      	  ,usb2-phy            Wokay          usb@ff440000              generic-ehci                 D                 	       G                                   '   A        ,usb         Wokay          usb@ff450000              generic-ohci                 E                 	       H                                   '   A        ,usb         Wokay          mmc@ff480000          0    rockchip,rk3308-dw-mshc rockchip,rk3288-dw-mshc              H        @         	       L           6                         0      1      2        biu ciu ciu-drive ciu-sample            @           Kр        default            B   C   D   E        Wokay             Y         k         |                 mmc@ff490000          0    rockchip,rk3308-dw-mshc rockchip,rk3288-dw-mshc              I        @         	       M           6                         :      ;      <        biu ciu ciu-drive ciu-sample            @           Kр        Wokay             Y               mmc@ff4a0000          0    rockchip,rk3308-dw-mshc rockchip,rk3288-dw-mshc              J        @         	       N           6                         5      6      7        biu ciu ciu-drive ciu-sample            @           Kр        default            F   G   H        Wokay                         +             k                             I                              wifi@1        %    brcm,bcm43455-fmac brcm,bcm4329-fmac                            J        	             
  host-wake           default            K         nand-controller@ff4b0000          (    rockchip,rk3308-nfc rockchip,rv1108-nfc              K        @         	       Q                        -        ahb nfc               -        р           L   M   N   O   P   Q   R        default       	  Wdisabled          ethernet@ff4e0000             rockchip,rk3308-gmac                 N                 	       @           macirq        @         @      B      B      A      @                  C      [  stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac clk_mac_speed          rmii            default            S   T              }      
  stmmaceth              :      	  Wdisabled          spi@ff4c0000              rockchip,sfc                 L        @         	       R                  =              clk_sfc hclk_sfc               U   V   W        default       	  Wdisabled          clock-controller@ff500000             rockchip,rk3308-cru              P                     X        xin24m             :        J                                                C         codec@ff560000            rockchip,rk3308-codec                V                    :        mclk_tx mclk_rx hclk                   U      W              codec                                   	  Wdisabled          interrupt-controller@ff580000             arm,gic-400       @       X            X              X@             X`                 	      	                       /                     C         sram@fff80000         
    mmio-sram                                 D                                  +      ddr-sram@0                        vad-sram@8000                          pinctrl           rockchip,rk3308-pinctrl            :                     +            D        default            Y   gpio@ff220000             rockchip,gpio-bank               "                 	       (                           K        [            /                   C   J      gpio@ff230000             rockchip,gpio-bank               #                 	       )                           K        [            /                 gpio@ff240000             rockchip,gpio-bank               $                 	       *                           K        [            /                 gpio@ff250000             rockchip,gpio-bank               %                 	       +                           K        [            /                 gpio@ff260000             rockchip,gpio-bank               &                 	       ,                           K        [            /                   C         pcfg-pull-up             g        C   c      pcfg-pull-down           t        C   `      pcfg-pull-none                   C   \      pcfg-pull-none-2ma                            pcfg-pull-up-2ma             g                 pcfg-pull-up-4ma             g                   C   b      pcfg-pull-none-4ma                              C   a      pcfg-pull-down-4ma           t                 pcfg-pull-none-8ma                              C   Z      pcfg-pull-up-8ma             g                   C   [      pcfg-pull-none-12ma                             C   ^      pcfg-pull-up-12ma            g                   C   ]      pcfg-pull-none-smt                            C   _      pcfg-output-high                   pcfg-output-low                pcfg-input-high          g               pcfg-input                 emmc       emmc-clk                  	      Z      emmc-cmd                        [      emmc-pwren                      \      emmc-rstn                 
      \      emmc-bus1                        [      emmc-bus4         @               [            [            [            [      emmc-bus8                        [            [            [            [            [            [            [            [         flash      flash-csn0                      \        C   O      flash-rdy                       \        C   Q      flash-ale                       \        C   L      flash-cle                 	      \        C   N      flash-wrn                       \        C   R      flash-rdn                 
      \        C   P      flash-bus8                       ]            ]            ]            ]            ]            ]            ]            ]        C   M         sfc    sfc-bus4          @               \            \            \            \        C   W      sfc-bus2                          \            \      sfc-cs0                     \        C   V      sfc-clk                     \        C   U         gmac       rmii-pins                       ^            ^            ^            \            \            \            \            \            \        C   S      mac-refclk-12ma                     ^        C   T      mac-refclk                      \         gmac-m1    rmiim1-pins                     ^            ^            ^            \            \             \            \            \            \      macm1-refclk-12ma                       ^      macm1-refclk                        \         i2c0       i2c0-xfer                        _            _        C            i2c1       i2c1-xfer                         _             _        C            i2c2       i2c2-xfer                        _            _        C            i2c3-m0    i2c3m0-xfer                       _             _        C            i2c3-m1    i2c3m1-xfer                      _            _         i2c3-m2    i2c3m2-xfer                      _             _         i2s_2ch_0      i2s-2ch-0-mclk                      \      i2s-2ch-0-sclk                      \        C   ;      i2s-2ch-0-lrck                      \        C   <      i2s-2ch-0-sdo                       \        C   >      i2s-2ch-0-sdi                       \        C   =         i2s_8ch_0      i2s-8ch-0-mclk                      \      i2s-8ch-0-sclktx                        \      i2s-8ch-0-sclkrx                        \      i2s-8ch-0-lrcktx                        \      i2s-8ch-0-lrckrx                        \      i2s-8ch-0-sdo0                	      \      i2s-8ch-0-sdo1                
      \      i2s-8ch-0-sdo2                      \      i2s-8ch-0-sdo3                      \      i2s-8ch-0-sdi0                      \      i2s-8ch-0-sdi1                      \      i2s-8ch-0-sdi2                      \      i2s-8ch-0-sdi3                      \         i2s_8ch_1_m0       i2s-8ch-1-m0-mclk                       \      i2s-8ch-1-m0-sclktx                     \      i2s-8ch-1-m0-sclkrx                     \      i2s-8ch-1-m0-lrcktx                     \      i2s-8ch-1-m0-lrckrx                     \      i2s-8ch-1-m0-sdo0                       \      i2s-8ch-1-m0-sdo1-sdi3                      \      i2s-8ch-1-m0-sdo2-sdi2                	      \      i2s-8ch-1-m0-sdo3_sdi1                
      \      i2s-8ch-1-m0-sdi0                       \         i2s_8ch_1_m1       i2s-8ch-1-m1-mclk                       \      i2s-8ch-1-m1-sclktx                     \      i2s-8ch-1-m1-sclkrx                     \      i2s-8ch-1-m1-lrcktx                     \      i2s-8ch-1-m1-lrckrx                     \      i2s-8ch-1-m1-sdo0                       \      i2s-8ch-1-m1-sdo1-sdi3                      \      i2s-8ch-1-m1-sdo2-sdi2                      \      i2s-8ch-1-m1-sdo3_sdi1                      \      i2s-8ch-1-m1-sdi0                       \         pdm_m0     pdm-m0-clk                      \      pdm-m0-sdi0                     \      pdm-m0-sdi1               
      \      pdm-m0-sdi2               	      \      pdm-m0-sdi3                     \         pdm_m1     pdm-m1-clk                      \      pdm-m1-sdi0                     \      pdm-m1-sdi1                     \      pdm-m1-sdi2                     \      pdm-m1-sdi3                     \         pdm_m2     pdm-m2-clkm                     \      pdm-m2-clk                      \      pdm-m2-sdi0                     \      pdm-m2-sdi1                     \      pdm-m2-sdi2                     \      pdm-m2-sdi3                     \         pwm0       pwm0-pin                         \      pwm0-pin-pull-down                       `        C   5         pwm1       pwm1-pin                         \        C   6      pwm1-pin-pull-down                       `         pwm2       pwm2-pin                         \        C   7      pwm2-pin-pull-down                       `         pwm3       pwm3-pin                         \        C   8      pwm3-pin-pull-down                       `         pwm4       pwm4-pin                         \        C   1      pwm4-pin-pull-down                       `         pwm5       pwm5-pin                         \        C   2      pwm5-pin-pull-down                       `         pwm6       pwm6-pin                         \        C   3      pwm6-pin-pull-down                       `         pwm7       pwm7-pin                        \        C   4      pwm7-pin-pull-down                      `         pwm8       pwm8-pin                  
      \        C   -      pwm8-pin-pull-down                
      `         pwm9       pwm9-pin                        \        C   .      pwm9-pin-pull-down                      `         pwm10      pwm10-pin                       \        C   /      pwm10-pin-pull-down                     `         pwm11      pwm11-pin                       \        C   0      pwm11-pin-pull-down                     `         rtc    rtc-32k                      \        C   Y         sdmmc      sdmmc-clk                       a        C   B      sdmmc-cmd                       b        C   C      sdmmc-det                        b        C   D      sdmmc-pwren                     a      sdmmc-bus1                      b      sdmmc-bus4        @              b            b            b            b        C   E         sdio       sdio-clk                        Z        C   H      sdio-cmd                        [        C   G      sdio-pwren                       Z      sdio-wrpt                        Z      sdio-intn                         Z      sdio-bus1                        [      sdio-bus4         @               [            [            [            [        C   F         spdif_in       spdif-in                         \         spdif_out      spdif-out                        \        C   ?         spi0       spi0-clk                        b        C          spi0-csn0                       b        C   !      spi0-miso                        b        C   "      spi0-mosi                       b        C   #         spi1       spi1-clk                        b        C   $      spi1-csn0                       b        C   %      spi1-miso                 
      b        C   &      spi1-mosi                       b        C   '         spi1-m1    spi1m1-miso                     b      spi1m1-mosi                     b      spi1m1-clk                      b      spi1m1-csn0               	      b         spi2       spi2-clk                        b        C   )      spi2-csn0                       b        C   *      spi2-miso                       b        C   +      spi2-mosi                       b        C   ,         tsadc      tsadc-otp-pin                  
       \      tsadc-otp-out                  
      \         uart0      uart0-xfer                       c             c        C         uart0-cts                       \        C         uart0-rts                       \        C         uart0-rts-pin                        \         uart1      uart1-xfer                       c            c        C         uart1-cts                       \        C         uart1-rts                       \        C            uart2-m0       uart2m0-xfer                         c            c        C            uart2-m1       uart2m1-xfer                         c            c         uart3      uart3-xfer                       c            c        C            uart3-m1       uart3m1-xfer                          c             c         uart4      uart4-xfer                 	      c            c        C         uart4-cts                       \        C         uart4-rts                       \        C         uart4-rts-pin                        \         bluetooth      bt-reg-on                        \        C         bt-wake-host                         \        C         host-wake-bt                  
       \        C            sdio-pwrseq    wifi-enable-h                         \        C   h         usb    otg-vbus-drv                          \        C   g         wifi       wifi-host-wake                         `        C   K            chosen          serial2:1500000n8         regulator-vcc5v0-sys              regulator-fixed         vcc5v0_sys                            ' LK@        ? LK@        C   e      regulator-vdd-core            pwm-regulator           W   d               	  vdd_core            ' x        ? r`        \                             z   e        C         regulator-vdd-log             regulator-fixed         vdd_log                           '         ?            e      regulator-vcc-ddr             regulator-fixed         vcc_ddr                           ' `        ? `           e      regulator-vcc-1v8             regulator-fixed         vcc_1v8                           ' w@        ? w@           f        C   9      regulator-vcc-io              regulator-fixed         vcc_io                            ' 2Z        ? 2Z           e        C   f      regulator-vcc-phy-regulator           regulator-fixed         vcc_phy                         regulator-vcc5v0-otg              regulator-fixed                     J               default            g        vcc5v0_otg                      e      sdio-pwrseq           mmc-pwrseq-simple              h        default            J              C   I         	compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 serial0 serial1 serial2 serial3 serial4 spi0 spi1 spi2 mmc0 mmc1 mmc2 device_type reg enable-method clocks #cooling-cells dynamic-power-coefficient operating-points-v2 cpu-idle-states next-level-cache cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us cache-level cache-unified opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend interrupts interrupt-affinity clock-frequency clock-output-names #clock-cells status offset mode-bootloader mode-loader mode-normal mode-recovery mode-fastboot assigned-clocks assigned-clock-parents clock-names interrupt-names #phy-cells pinctrl-names pinctrl-0 reg-shift reg-io-width uart-has-rtscts device-wakeup-gpios host-wakeup-gpios shutdown-gpios max-speed dmas dma-names #pwm-cells #io-channel-cells resets reset-names vref-supply arm,pl330-periph-burst #dma-cells rockchip,grf dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size phys phy-names bus-width fifo-depth max-frequency cap-mmc-highspeed cap-sd-highspeed disable-wp card-detect-delay non-removable cap-sdio-irq keep-power-in-suspend mmc-pwrseq no-mmc no-sd assigned-clock-rates phy-mode #reset-cells #sound-dai-cells #interrupt-cells interrupt-controller ranges gpio-controller #gpio-cells bias-pull-up bias-pull-down bias-disable drive-strength input-schmitt-enable output-high output-low input-enable rockchip,pins stdout-path regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt pwms regulator-settling-time-up-us pwm-supply vin-supply enable-active-high gpio reset-gpios 