    8  $   (                                           '    tsd,px30-ringneck-haikou rockchip,px30                                   +         0   7Theobroma Systems PX30-uQ7 SoM on Haikou devkit    aliases          =/i2c@ff180000            B/i2c@ff190000            G/i2c@ff1a0000            L/i2c@ff1b0000            Q/serial@ff030000             Y/serial@ff158000             a/serial@ff160000             i/serial@ff168000             q/serial@ff170000             y/serial@ff178000             /spi@ff1d0000            /spi@ff1d8000         #   /i2c@ff190000/fan@18/i2c-mux/i2c@0           /mmc@ff390000            /mmc@ff380000         *   /i2c@ff190000/fan@18/i2c-mux/i2c@0/rtc@6f            /i2c@ff180000/pmic@20            /ethernet@ff360000           /mmc@ff370000         cpus                         +       cpu@0            cpu           arm,cortex-a35                            psci                                                          Z                   &           1         cpu@1            cpu           arm,cortex-a35                           psci                                                          Z                   &           1         cpu@2            cpu           arm,cortex-a35                           psci                                                          Z                   &           1   	      cpu@3            cpu           arm,cortex-a35                           psci                                                          Z                   &           1   
      idle-states         9psci       cpu-sleep             arm,idle-state           F        W           n   x                             1         cluster-sleep             arm,idle-state           F        W          n                              1               opp-table-0           operating-points-v2                  1      opp-600000000               #F          ~ ~ p          @               opp-816000000               0,            p          @      opp-1008000000              <            p          @      opp-1200000000              G              p          @      opp-1296000000              M?d          p p p          @         arm-pmu           arm,cortex-a35-pmu        0         d          e          f          g                    	   
      display-subsystem             rockchip,display-subsystem                      	  disabled            1         external-gmac-clock           fixed-clock                 gmac_clkin          +            1         psci              arm,psci-1.0             smc       timer             arm,armv8-timer       0                                
        thermal-zones           1      soc-thermal         8           N          \          n               1      trips      trip-point-0            ~ p                   passive         1         trip-point-1            ~ L                   passive         1         soc-crit            ~ 8                	   critical            1            cooling-maps       map0                                                 gpu-thermal         8   d        N          n              1      trips      gpu-threshold           ~ p                   passive         1         gpu-target          ~ L                   passive         1         gpu-crit            ~ 8                	   critical            1            cooling-maps       map0                                         xin24m            fixed-clock         +            n6         xin24m          1   g      power-management@ff000000         $    rockchip,px30-pmu syscon simple-mfd                                1      power-controller              rockchip,px30-power-controller                                  +            1   i   power-domain@5                                       <                                power-domain@7                                   ;                             power-domain@9              	                     C      @      ?                             power-domain@10             
      @                                9      7      8      :                                      power-domain@11                                        K                                power-domain@12                   X                                                        D      5      6                                      power-domain@13                   (                                 3                  !   "   #                  power-domain@14                            I           $                        syscon@ff010000       '    rockchip,px30-pmugrf syscon simple-mfd                                1      io-domains        $    rockchip,px30-pmu-io-voltage-domain         okay               %           %        1         reboot-mode           syscon-reboot-mode                     RB        RB	        RB        RB         *RB         serial@ff030000       $    rockchip,px30-uart snps,dw-apb-uart                                                     &      &           8baudclk apb_pclk            D   '       '           Itx rx           S           ]           jdefault         x   (        okay            1         i2s@ff060000              rockchip,px30-i2s-tdm                                                                             8mclk_tx mclk_rx hclk            D   '      '           Itx rx              )                          
  tx-m rx-m           jdefault         x   *   +   ,   -                    okay                     1         i2s@ff070000          &    rockchip,px30-i2s rockchip,rk3066-i2s                                                                       8i2s_clk i2s_hclk            D   '      '           Itx rx           jdefault         x   .   /   0   1                  	  disabled            1         i2s@ff080000          &    rockchip,px30-i2s rockchip,rk3066-i2s                                                                       8i2s_clk i2s_hclk            D   '      '           Itx rx           jdefault         x   2   3   4   5                  	  disabled            1         interrupt-controller@ff131000             arm,gic-400                                        @                                 @             `                       	          1         syscon@ff140000       $    rockchip,px30-grf syscon simple-mfd                               1   )   io-domains             rockchip,px30-io-voltage-domain         okay               %           6           %           %        ,   %        :   7        H   %        1         lvds              rockchip,px30-lvds          \   8        adphy               )        klvds          	  disabled            1      ports                        +       port@0                                    +            1      endpoint@0                       {   9        1         endpoint@1                      {   :        1            port@1                      1                  serial@ff158000       $    rockchip,px30-uart snps,dw-apb-uart                                                            I        8baudclk apb_pclk            D   '      '           Itx rx           S           ]           jdefault         x   ;   <   =      	  disabled            1         serial@ff160000       $    rockchip,px30-uart snps,dw-apb-uart                                                             J        8baudclk apb_pclk            D   '      '           Itx rx           S           ]           jdefault         x   >      	  disabled            1         serial@ff168000       $    rockchip,px30-uart snps,dw-apb-uart                                                            K        8baudclk apb_pclk            D   '      '           Itx rx           S           ]           jdefault         x   ?   @   A      	  disabled            1         serial@ff170000       $    rockchip,px30-uart snps,dw-apb-uart                                                             L        8baudclk apb_pclk            D   '      '   	        Itx rx           S           ]           jdefault         x   B   C   D      	  disabled            1         serial@ff178000       $    rockchip,px30-uart snps,dw-apb-uart                                                            M        8baudclk apb_pclk            S           ]           jdefault         x   E   F        okay               G               1         i2c@ff180000          &    rockchip,px30-i2c rockchip,rk3399-i2c                                             N      	  8i2c pclk                              jdefault         x   H                     +            okay            1      pmic@20           rockchip,rk809                           G                      x   I        jdefault         +            xin32k                               J           J           J           J           %           %           %           J        1      regulators     DCDC_REG1           vdd_log         * ~        B p        Z  q         o                 1      regulator-state-mem                   ~         DCDC_REG2           vdd_arm         * ~        B p        Z  q         o                 1      regulator-state-mem                   ~         DCDC_REG3           vcc_ddr          o                 1      regulator-state-mem                   DCDC_REG4           vcc_3v0_1v8         * w@        B -         o                 1   7   regulator-state-mem                   -         DCDC_REG5           vcc_3v3         * 2Z        B 2Z         o                 1   %   regulator-state-mem                   2Z         LDO_REG2            vcc_1v8         * w@        B w@         o                 1   f   regulator-state-mem                   w@         LDO_REG3            vcc_1v0         * B@        B B@         o                 1      regulator-state-mem                   B@         LDO_REG5          	  vccio_sd            * w@        B 2Z         o                 1   6   regulator-state-mem                   2Z         LDO_REG7             o                 * B@        B B@        vcc_lcd         1      regulator-state-mem                   B@         LDO_REG8            vcc_1v8_lcd         * w@        B w@         o                 1      regulator-state-mem                   w@         LDO_REG9          	  vcca_1v8            * w@        B w@         o                 1      regulator-state-mem                   w@         SWITCH_REG1         vg_attiny_updi          1                  i2c@ff190000          &    rockchip,px30-i2c rockchip,rk3399-i2c                                             O      	  8i2c pclk                              jdefault         x   K                     +            okay                     1      fan@18            tsd,mule ti,amc6821                     1      i2c-mux           tsd,mule-i2c-mux                         +       i2c@0                                     +            1      rtc@6f            isil,isl1208                o        1                     i2c@ff1a0000          &    rockchip,px30-i2c rockchip,rk3399-i2c                                             P      	  8i2c pclk                   	           jdefault         x   L                     +            okay                     1      codec@a           fsl,sgtl5000                
            M                       N           O           P        1            i2c@ff1b0000          &    rockchip,px30-i2c rockchip,rk3399-i2c                                              Q      	  8i2c pclk                   
           jdefault         x   Q                     +            okay            1      eeprom@50               P          atmel,24c01                                  O         spi@ff1d0000          &    rockchip,px30-spi rockchip,rk3066-spi                                                          $     U        8spiclk apb_pclk         D   '      '           Itx rx                      jdefault         x   R   S   T   U                     +          	  disabled            1         spi@ff1d8000          &    rockchip,px30-spi rockchip,rk3066-spi                                                         %     V        8spiclk apb_pclk         D   '      '           Itx rx                      jdefault         x   V   W   X   Y   Z                     +            okay            "   [   	      [   
           1         watchdog@ff1e0000             rockchip,px30-wdt snps,dw-wdt                                       [               %           okay            1         pwm@ff200000          &    rockchip,px30-pwm rockchip,rk3328-pwm                                         "     S      	  8pwm pclk            jdefault         x   \        +           okay            1         pwm@ff200010          &    rockchip,px30-pwm rockchip,rk3328-pwm                                        "     S      	  8pwm pclk            jdefault         x   ]        +         	  disabled            1         pwm@ff200020          &    rockchip,px30-pwm rockchip,rk3328-pwm                                         "     S      	  8pwm pclk            jdefault         x   ^        +         	  disabled            1         pwm@ff200030          &    rockchip,px30-pwm rockchip,rk3328-pwm                  0                      "     S      	  8pwm pclk            jdefault         x   _        +         	  disabled            1         pwm@ff208000          &    rockchip,px30-pwm rockchip,rk3328-pwm                                        #     T      	  8pwm pclk            jdefault         x   `        +         	  disabled            1         pwm@ff208010          &    rockchip,px30-pwm rockchip,rk3328-pwm                                       #     T      	  8pwm pclk            jdefault         x   a        +         	  disabled            1         pwm@ff208020          &    rockchip,px30-pwm rockchip,rk3328-pwm                                        #     T      	  8pwm pclk            jdefault         x   b        +         	  disabled            1         pwm@ff208030          &    rockchip,px30-pwm rockchip,rk3328-pwm                 0                      #     T      	  8pwm pclk            jdefault         x   c        +         	  disabled            1         timer@ff210000        *    rockchip,px30-timer rockchip,rk3288-timer                !                                         Y      &        8pclk timer          1         dma-controller@ff240000           arm,pl330 arm,primecell              $        @                                      6                     	  8apb_pclk            M           1   '      tsadc@ff280000            rockchip,px30-tsadc              (                        $           X      ,        h  P               ,     X        8tsadc apb_pclk                      
  tsadc-apb              )        }         jinit default sleep          x   d           e           d                   okay            1         saradc@ff288000       ,    rockchip,px30-saradc rockchip,rk3399-saradc              (                       T                             -     W        8saradc apb_pclk                       saradc-apb          okay               f        1         nvmem@ff290000            rockchip,px30-otp                )        @                /     Z     a        8otp apb_pclk phy                          phy                      +           1      id@7                           1         cpu-leakage@17                         1         performance@1e                                       1            clock-controller@ff2b0000             rockchip,px30-cru                +                     g   &           8xin24m gpll            )        +                    8  X                                   @      I        hFq   рр          1         clock-controller@ff2bc000             rockchip,px30-pmucru                 +                    g        8xin24m             )        +                      X   &      &      &           hG          1   &      syscon@ff2c0000       ,    rockchip,px30-usb2phy-grf syscon simple-mfd              ,                              +           1      usb2phy@100           rockchip,px30-usb2phy                               &   
        8phyclk          +            X                 h        usb480m_phy         okay            1   h   host-port                              D         
  linestate           okay            1   k      otg-port                      $         B          A          @           otg-bvalid otg-id linestate         okay            1   j            phy@ff2e0000              rockchip,px30-dsi-dphy               .                     &        E      	  8ref pclk                  >        apb                         i         	  disabled            1   8      phy@ff2f0000              rockchip,px30-csi-dphy               /        @               F        8pclk                            i                 /        apb            )      	  disabled            1         usb@ff300000          0    rockchip,px30-usb rockchip,rk3066-usb snps,dwc2              0                        >                         8otg         .otg         6           H          W            @               \   j      	  ausb2-phy                i           okay            1         usb@ff340000              generic-ehci                 4                        <                         \   k        ausb             i           okay            1         usb@ff350000              generic-ohci                 5                        =                         \   k        ausb             i           okay            1         ethernet@ff360000             rockchip,px30-gmac               6                        +           macirq        @         >      ?      ?      @      A           C      L      [  8stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac clk_mac_speed             )        frmii            jdefault         x   l   m            i   	              ^      
  stmmaceth           okay            o   n        z   %        output          1      mdio              snps,dwmac-mdio                      +            1      ethernet-phy@0            ethernet-phy-ieee802.3-c22                       jdefault         x   o          P          P           [              1   n            mmc@ff370000          .    rockchip,px30-dw-mshc rockchip,rk3288-dw-mshc                7        @                6                         ;      C      D        8biu ciu ciu-drive ciu-sample                                  р        jdefault         x   p   q   r   s            i           okay               6                           
                  )        :   G               C        N   O        1         mmc@ff380000          .    rockchip,px30-dw-mshc rockchip,rk3288-dw-mshc                8        @                7                         8      E      F        8biu ciu ciu-drive ciu-sample                                  р        jdefault         x   t   u   v            i   
      	  disabled            1         mmc@ff390000          .    rockchip,px30-dw-mshc rockchip,rk3288-dw-mshc                9        @                5                         9      G      H        8biu ciu ciu-drive ciu-sample                                  р        jdefault         x   w   x   y            i   
        okay                      Z        i   z         t        N   %           7        1         spi@ff3a0000              rockchip,sfc                 :        @                8                  :             8clk_sfc hclk_sfc            x   {   |   }        jdefault             i   
      	  disabled            1         nand-controller@ff3b0000              rockchip,px30-nfc                ;        @                9                        7        8ahb nfc         X      7        hр        jdefault          x   ~                                 i   
      	  disabled            1         opp-table-1           operating-points-v2         1      opp-200000000                         ~      opp-300000000                               opp-400000000               ׄ                opp-480000000               8          *         gpu@ff400000          $    rockchip,px30-mali arm,mali-bifrost              @        @       $         /          .          -           job mmu gpu                I                        i                      okay            1         video-codec@ff442000              rockchip,px30-vpu                D                        P          O         
  vepu vdpu                              
  8aclk hclk                          i           1         iommu@ff442800            rockchip,iommu               D(                       Q                                8aclk iface                          i           1         dsi@ff450000          (    rockchip,px30-mipi-dsi snps,dw-mipi-dsi              E                        K                 D        8pclk            \   8        adphy                i                 =        apb            )      	  disabled            1      ports                        +       port@0                                    +            1      endpoint@0                       {           1         endpoint@1                      {           1            port@1                      1               vop@ff460000              rockchip,px30-vop-big                F                       M                                      8aclk_vop dclk_vop hclk_vop                3      4      5        axi ahb dclk                           i         	  disabled            1      port                         +            1      endpoint@0                       {           1         endpoint@1                      {           1   9            iommu@ff460f00            rockchip,iommu               F                       M                                8aclk iface              i                     	  disabled            1         vop@ff470000              rockchip,px30-vop-lit                G                       N                                      8aclk_vop dclk_vop hclk_vop                7      8      9        axi ahb dclk                           i         	  disabled            1      port                         +            1      endpoint@0                       {           1         endpoint@1                      {           1   :            iommu@ff470f00            rockchip,iommu               G                       N                                8aclk iface              i                     	  disabled            1         isp@ff4a0000              rockchip,px30-cif-isp                J               $         F          I          J           isp mi mipi                 3                 _        8isp aclk hclk pclk                     \           adphy                i         	  disabled            1      ports                        +       port@0                       1               iommu@ff4a8000            rockchip,iommu               J                       F                                8aclk iface              i                                1         qos@ff518000              rockchip,px30-qos syscon                 Q                 1         qos@ff520000              rockchip,px30-qos syscon                 R                  1   $      qos@ff52c000              rockchip,px30-qos syscon                 R                 1         qos@ff538000              rockchip,px30-qos syscon                 S                 1         qos@ff538080              rockchip,px30-qos syscon                 S                1         qos@ff538100              rockchip,px30-qos syscon                 S                 1         qos@ff538180              rockchip,px30-qos syscon                 S                1         qos@ff540000              rockchip,px30-qos syscon                 T                  1         qos@ff540080              rockchip,px30-qos syscon                 T                 1         qos@ff548000              rockchip,px30-qos syscon                 T                 1         qos@ff548080              rockchip,px30-qos syscon                 T                1          qos@ff548100              rockchip,px30-qos syscon                 T                 1   !      qos@ff548180              rockchip,px30-qos syscon                 T                1   "      qos@ff548200              rockchip,px30-qos syscon                 T                 1   #      qos@ff550000              rockchip,px30-qos syscon                 U                  1         qos@ff550080              rockchip,px30-qos syscon                 U                 1         qos@ff550100              rockchip,px30-qos syscon                 U                 1         qos@ff550180              rockchip,px30-qos syscon                 U                1         qos@ff558000              rockchip,px30-qos syscon                 U                 1         qos@ff558080              rockchip,px30-qos syscon                 U                1         pinctrl           rockchip,px30-pinctrl              )                                +                    1      gpio@ff040000             rockchip,gpio-bank                                                      &                                                   1   G      gpio@ff250000             rockchip,gpio-bank               %                                         \                                                1         gpio@ff260000             rockchip,gpio-bank               &                                         ]                                                1      bios-disable-override-hog                                  bios_disable_override                  bios-disable-n-hog                        bios_disable             	                   gpio@ff270000             rockchip,gpio-bank               '                                         ^                                                1   [      pcfg-pull-up             	        1         pcfg-pull-down           	        1         pcfg-pull-none           	"        1         pcfg-pull-none-2ma           	"        	/           1         pcfg-pull-up-2ma             	        	/           1         pcfg-pull-up-4ma             	        	/           1         pcfg-pull-none-4ma           	"        	/           1         pcfg-pull-down-4ma           	        	/           1         pcfg-pull-none-8ma           	"        	/           1         pcfg-pull-up-8ma             	        	/           1         pcfg-pull-none-12ma          	"        	/           1         pcfg-pull-up-12ma            	        	/           1         pcfg-pull-none-smt           	"         	>        1         pcfg-output-high                     1         pcfg-output-low          	S        1         pcfg-input-high          	         	^        1         pcfg-input           	^        1         i2c0       i2c0-xfer            	k                    	              1   H         i2c1       i2c1-xfer            	k                                  1   K         i2c2       i2c2-xfer            	k                                1   L         i2c3       i2c3-xfer            	k                                1   Q         tsadc      tsadc-otp-pin           	k                      1   d      tsadc-otp-out           	k                     1   e         uart0      uart0-xfer           	k       
                           1   (      uart0-cts           	k                     1         uart0-rts           	k                     1            uart1      uart1-xfer           	k                                1   ;      uart1-cts           	k                    1   <      uart1-rts           	k                    1   =         uart2-m0       uart2m0-xfer             	k                                1   >         uart2-m1       uart2m1-xfer             	k                                1            uart3-m0       uart3m0-xfer             	k                                  1         uart3m0-cts         	k                     1         uart3m0-rts         	k                     1            uart3-m1       uart3m1-xfer             	k                                1   ?      uart3m1-cts         	k                    1   @      uart3m1-rts         	k                    1   A         uart4      uart4-xfer           	k                                1   B      uart4-cts           	k                    1   C      uart4-rts           	k                    1   D         uart5      uart5-xfer           	k                                1   E      uart5-cts           	k                    1         uart5-rts           	k                    1           spi0       spi0-clk            	k                    1   R      spi0-csn            	k                    1   S      spi0-miso           	k                    1   T      spi0-mosi           	k                    1   U      spi0-clk-hs         	k                    1        spi0-miso-hs            	k                    1        spi0-mosi-hs            	k                    1           spi1       spi1-clk            	k                    1   V      spi1-csn0           	k      	              1        spi1-csn1           	k      
              1        spi1-miso           	k                    1   Y      spi1-mosi           	k                    1   Z      spi1-clk-hs         	k                    1        spi1-miso-hs            	k                    1        spi1-mosi-hs            	k                    1  	      spi1-csn0-gpio-pin          	k      	               1   W      spi1-csn1-gpio-pin          	k      
               1   X         pdm    pdm-clk0m0          	k                    1  
      pdm-clk0m1          	k                    1        pdm-clk1            	k                    1        pdm-sdi0m0          	k                    1        pdm-sdi0m1          	k                    1        pdm-sdi1            	k                    1        pdm-sdi2            	k                    1        pdm-sdi3            	k                    1        pdm-clk0m0-sleep            	k                     1        pdm-clk0m1-sleep            	k                     1        pdm-clk1-sleep          	k                     1        pdm-sdi0m0-sleep            	k                     1        pdm-sdi0m1-sleep            	k                     1        pdm-sdi1-sleep          	k                     1        pdm-sdi2-sleep          	k                     1        pdm-sdi3-sleep          	k                     1           i2s0       i2s0-8ch-mclk           	k                    1        i2s0-8ch-sclktx         	k                    1   *      i2s0-8ch-sclkrx         	k                    1        i2s0-8ch-lrcktx         	k                    1   +      i2s0-8ch-lrckrx         	k                    1        i2s0-8ch-sdo0           	k                    1   ,      i2s0-8ch-sdo1           	k                    1        i2s0-8ch-sdo2           	k                    1        i2s0-8ch-sdo3           	k                    1        i2s0-8ch-sdi0           	k                    1   -      i2s0-8ch-sdi1           	k                    1         i2s0-8ch-sdi2           	k      	              1  !      i2s0-8ch-sdi3           	k                    1  "         i2s1       i2s1-2ch-mclk           	k                    1  #      i2s1-2ch-sclk           	k                    1   .      i2s1-2ch-lrck           	k                    1   /      i2s1-2ch-sdi            	k                    1   0      i2s1-2ch-sdo            	k                    1   1         i2s2       i2s2-2ch-mclk           	k                    1  $      i2s2-2ch-sclk           	k                    1   2      i2s2-2ch-lrck           	k                    1   3      i2s2-2ch-sdi            	k                    1   4      i2s2-2ch-sdo            	k                    1   5         sdmmc      sdmmc-clk           	k                    1   p      sdmmc-cmd           	k                    1   q      sdmmc-det           	k                     1   r      sdmmc-bus1          	k                    1  %      sdmmc-bus4        @  	k                                                        1   s         sdio       sdio-clk            	k                    1   v      sdio-cmd            	k                    1   u      sdio-bus4         @  	k                                                        1   t         emmc       emmc-clk            	k      	              1   w      emmc-cmd            	k      
              1   x      emmc-rstnout            	k                    1  &      emmc-bus1           	k                     1  '      emmc-bus4         @  	k                                                         1  (      emmc-bus8           	k                                                                                                         1   y      emmc-reset          	k                     1            flash      flash-cs0           	k                    1         flash-rdy           	k      	              1         flash-dqs           	k      
              1         flash-ale           	k                    1   ~      flash-cle           	k                    1         flash-wrn           	k                    1         flash-csl           	k                    1  )      flash-rdn           	k                    1         flash-bus8          	k                                                                                                         1            sfc    sfc-bus4          @  	k                                                         1   }      sfc-bus2             	k                                 1  *      sfc-cs0         	k                    1   |      sfc-clk         	k      	              1   {         lcdc       lcdc-rgb-dclk-pin           	k                     1  +      lcdc-rgb-m0-hsync-pin           	k                    1  ,      lcdc-rgb-m0-vsync-pin           	k                    1  -      lcdc-rgb-m0-den-pin         	k                    1  .      lcdc-rgb888-m0-data-pins           	k                                                                  
            	                                                                                                                                                                                                                          1  /      lcdc-rgb666-m0-data-pins            	k                                                                  
            	                                                                                                                                                  1  0      lcdc-rgb565-m0-data-pins            	k                                                                  
            	                                                                                                                          1  1      lcdc-rgb888-m1-data-pins           	k                                          
                                                                                                                                                                          1  2      lcdc-rgb666-m1-data-pins            	k                                          
                                                                                                  1  3      lcdc-rgb565-m1-data-pins            	k                                          
                                                                          1  4         pwm0       pwm0-pin            	k                     1   \         pwm1       pwm1-pin            	k                     1   ]         pwm2       pwm2-pin            	k                    1   ^         pwm3       pwm3-pin            	k                     1   _         pwm4       pwm4-pin            	k                    1   `         pwm5       pwm5-pin            	k                    1   a         pwm6       pwm6-pin            	k                    1   b         pwm7       pwm7-pin            	k                    1   c         gmac       rmii-pins           	k                                                                                                       	              1   l      mac-refclk-12ma         	k      
              1   m      mac-refclk          	k      
              1  5         cif-m0     cif-clkout-m0           	k                    1  6      dvp-d2d9-m0         	k                                                                                                                   	            
                          1  7      dvp-d0d1-m0          	k                                1  8      d10-d11-m0           	k                                1  9         cif-m1     cif-clkout-m1           	k                    1  :      dvp-d2d9-m1         	k                                                      	                                                                                                  1  ;      dvp-d0d1-m1          	k                                1  <      d10-d11-m1           	k                                1  =         isp    isp-prelight            	k                    1  >         ethernet       phy-rst         	k                     1   o         leds       module-led-pin          	k                     1         sd-card-led-pin         	k                     1            pmic       pmic-int            	k                      1   I         haikou     haikou-keys-pin       P  	k                                                                         1            uart       uart5-rts-pin           	k                      1   F            attiny-updi-gate-regulator            regulator-output            	y         emmc-pwrseq           mmc-pwrseq-emmc         x           jdefault                           1   z      leds          
    gpio-leds           jdefault         x              okay       led-0                           
  	heartbeat         
  	heartbeat           	           1  ?      led-1              [               	mmc2            	sd          	           1  @         regulator-vccsys              regulator-fixed         vcc5v0_sys           o                 * LK@        B LK@        1   J      chosen          	serial0:115200n8          gpio-keys         
    gpio-keys           x           jdefault    button-batlow-n         	BATLOW#         	              [            button-slp-btn-n          	  	SLP_BTN#            	                          button-wake-n           	WAKE#           	                                   switch-lid-btn-n          	  	LID_BTN#            	            	              [               i2s0-sound            simple-audio-card           	i2s         	Haikou,I2S-codec            
           
"           
A      simple-audio-card,codec         
c            
m        1         simple-audio-card,cpu           
c            sgtl5000-oscillator           fixed-clock         +            w          1   M      regulator-dc-12v              regulator-fixed         dc_12v           o                 *          B          1         regulator-vcc3v3-baseboard            regulator-fixed         vcc3v3_baseboard             o                 * 2Z        B 2Z        
           1   O      regulator-vcc5v0-baseboard            regulator-fixed         vcc5v0_baseboard             o                 * LK@        B LK@        
           1         regulator-vdda-codec              regulator-fixed         vdda_codec                   * 2Z        B 2Z        
           1   N      regulator-vddd-codec              regulator-fixed         vddd_codec                   * j         B j         
           1   P      __symbols__         
/cpus/cpu@0         
/cpus/cpu@1         
/cpus/cpu@2         
/cpus/cpu@3         
/cpus/idle-states/cpu-sleep          
/cpus/idle-states/cluster-sleep         
/opp-table-0            
/display-subsystem          
/external-gmac-clock            
/thermal-zones          
/thermal-zones/soc-thermal        .  
/thermal-zones/soc-thermal/trips/trip-point-0         .  /thermal-zones/soc-thermal/trips/trip-point-1         *  /thermal-zones/soc-thermal/trips/soc-crit           /thermal-zones/gpu-thermal        /  #/thermal-zones/gpu-thermal/trips/gpu-threshold        ,  1/thermal-zones/gpu-thermal/trips/gpu-target       *  </thermal-zones/gpu-thermal/trips/gpu-crit           E/xin24m         /power-management@ff000000        ,  h/power-management@ff000000/power-controller         L/syscon@ff010000            S/syscon@ff010000/io-domains         b/serial@ff030000            h/i2s@ff060000           q/i2s@ff070000           z/i2s@ff080000           /interrupt-controller@ff131000          /syscon@ff140000            W/syscon@ff140000/io-domains         /syscon@ff140000/lvds         #  /syscon@ff140000/lvds/ports/port@0        .  /syscon@ff140000/lvds/ports/port@0/endpoint@0         .  /syscon@ff140000/lvds/ports/port@0/endpoint@1         #  /syscon@ff140000/lvds/ports/port@1          /serial@ff158000            /serial@ff160000            /serial@ff168000            /serial@ff170000            /serial@ff178000             =/i2c@ff180000           /i2c@ff180000/pmic@20         +  /i2c@ff180000/pmic@20/regulators/DCDC_REG1        +  /i2c@ff180000/pmic@20/regulators/DCDC_REG2        +  /i2c@ff180000/pmic@20/regulators/DCDC_REG3        +  /i2c@ff180000/pmic@20/regulators/DCDC_REG4        +  /i2c@ff180000/pmic@20/regulators/DCDC_REG4        +  /i2c@ff180000/pmic@20/regulators/DCDC_REG5        *  /i2c@ff180000/pmic@20/regulators/LDO_REG2         *  /i2c@ff180000/pmic@20/regulators/LDO_REG3         *   /i2c@ff180000/pmic@20/regulators/LDO_REG5         *  )/i2c@ff180000/pmic@20/regulators/LDO_REG7         *  1/i2c@ff180000/pmic@20/regulators/LDO_REG8         *  =/i2c@ff180000/pmic@20/regulators/LDO_REG9         -  F/i2c@ff180000/pmic@20/regulators/SWITCH_REG1             B/i2c@ff190000           U/i2c@ff190000/fan@18          #   /i2c@ff190000/fan@18/i2c-mux/i2c@0        *  Y/i2c@ff190000/fan@18/i2c-mux/i2c@0/rtc@6f            G/i2c@ff1a0000           a/i2c@ff1a0000/codec@a            L/i2c@ff1b0000            /spi@ff1d0000            /spi@ff1d8000           j/watchdog@ff1e0000          n/pwm@ff200000           s/pwm@ff200010           x/pwm@ff200020           }/pwm@ff200030           /pwm@ff208000           /pwm@ff208010           /pwm@ff208020           /pwm@ff208030           /timer@ff210000         /dma-controller@ff240000            /tsadc@ff280000         /saradc@ff288000            /nvmem@ff290000         /nvmem@ff290000/id@7            /nvmem@ff290000/cpu-leakage@17          /nvmem@ff290000/performance@1e          /clock-controller@ff2b0000          /clock-controller@ff2bc000          /syscon@ff2c0000            /syscon@ff2c0000/usb2phy@100          '  /syscon@ff2c0000/usb2phy@100/host-port        &  /syscon@ff2c0000/usb2phy@100/otg-port           /phy@ff2e0000           /phy@ff2f0000           /usb@ff300000           !/usb@ff340000           0/usb@ff350000           ?/ethernet@ff360000          D/ethernet@ff360000/mdio       '  I/ethernet@ff360000/mdio/ethernet-phy@0          Q/mmc@ff370000           W/mmc@ff380000           /mmc@ff390000           \/spi@ff3a0000           `/nand-controller@ff3b0000           d/opp-table-1            r/gpu@ff400000           v/video-codec@ff442000           z/iommu@ff442800         /dsi@ff450000           /dsi@ff450000/ports/port@0        &  /dsi@ff450000/ports/port@0/endpoint@0         &  /dsi@ff450000/ports/port@0/endpoint@1           /dsi@ff450000/ports/port@1          /vop@ff460000           /vop@ff460000/port          /vop@ff460000/port/endpoint@0           /vop@ff460000/port/endpoint@1           /iommu@ff460f00         /vop@ff470000           /vop@ff470000/port          /vop@ff470000/port/endpoint@0           /vop@ff470000/port/endpoint@1           /iommu@ff470f00         /isp@ff4a0000           /isp@ff4a0000/ports/port@0          /iommu@ff4a8000         /qos@ff518000           #/qos@ff520000           +/qos@ff52c000           5/qos@ff538000           >/qos@ff538080           G/qos@ff538100           P/qos@ff538180           X/qos@ff540000           e/qos@ff540080           q/qos@ff548000           }/qos@ff548080           /qos@ff548100           /qos@ff548180           /qos@ff548200           /qos@ff550000           /qos@ff550080           /qos@ff550100           /qos@ff550180           /qos@ff558000           /qos@ff558080         	  /pinctrl            /pinctrl/gpio@ff040000          /pinctrl/gpio@ff250000          /pinctrl/gpio@ff260000          /pinctrl/gpio@ff270000          /pinctrl/pcfg-pull-up           /pinctrl/pcfg-pull-down         #/pinctrl/pcfg-pull-none         2/pinctrl/pcfg-pull-none-2ma         E/pinctrl/pcfg-pull-up-2ma           V/pinctrl/pcfg-pull-up-4ma           g/pinctrl/pcfg-pull-none-4ma         z/pinctrl/pcfg-pull-down-4ma         /pinctrl/pcfg-pull-none-8ma         /pinctrl/pcfg-pull-up-8ma           /pinctrl/pcfg-pull-none-12ma            /pinctrl/pcfg-pull-up-12ma          /pinctrl/pcfg-pull-none-smt         /pinctrl/pcfg-output-high           /pinctrl/pcfg-output-low            /pinctrl/pcfg-input-high            /pinctrl/pcfg-input         &/pinctrl/i2c0/i2c0-xfer         0/pinctrl/i2c1/i2c1-xfer         :/pinctrl/i2c2/i2c2-xfer         D/pinctrl/i2c3/i2c3-xfer         N/pinctrl/tsadc/tsadc-otp-pin            \/pinctrl/tsadc/tsadc-otp-out            j/pinctrl/uart0/uart0-xfer           u/pinctrl/uart0/uart0-cts            /pinctrl/uart0/uart0-rts            /pinctrl/uart1/uart1-xfer           /pinctrl/uart1/uart1-cts            /pinctrl/uart1/uart1-rts            /pinctrl/uart2-m0/uart2m0-xfer          /pinctrl/uart2-m1/uart2m1-xfer          /pinctrl/uart3-m0/uart3m0-xfer          /pinctrl/uart3-m0/uart3m0-cts           /pinctrl/uart3-m0/uart3m0-rts           /pinctrl/uart3-m1/uart3m1-xfer          /pinctrl/uart3-m1/uart3m1-cts            /pinctrl/uart3-m1/uart3m1-rts           /pinctrl/uart4/uart4-xfer           /pinctrl/uart4/uart4-cts            !/pinctrl/uart4/uart4-rts            +/pinctrl/uart5/uart5-xfer           6/pinctrl/uart5/uart5-cts            @/pinctrl/uart5/uart5-rts            J/pinctrl/spi0/spi0-clk          S/pinctrl/spi0/spi0-csn          \/pinctrl/spi0/spi0-miso         f/pinctrl/spi0/spi0-mosi         p/pinctrl/spi0/spi0-clk-hs           |/pinctrl/spi0/spi0-miso-hs          /pinctrl/spi0/spi0-mosi-hs          /pinctrl/spi1/spi1-clk          /pinctrl/spi1/spi1-csn0         /pinctrl/spi1/spi1-csn1         /pinctrl/spi1/spi1-miso         /pinctrl/spi1/spi1-mosi         /pinctrl/spi1/spi1-clk-hs           /pinctrl/spi1/spi1-miso-hs          /pinctrl/spi1/spi1-mosi-hs        !  /pinctrl/spi1/spi1-csn0-gpio-pin          !   /pinctrl/spi1/spi1-csn1-gpio-pin            /pinctrl/pdm/pdm-clk0m0         /pinctrl/pdm/pdm-clk0m1         )/pinctrl/pdm/pdm-clk1           2/pinctrl/pdm/pdm-sdi0m0         =/pinctrl/pdm/pdm-sdi0m1         H/pinctrl/pdm/pdm-sdi1           Q/pinctrl/pdm/pdm-sdi2           Z/pinctrl/pdm/pdm-sdi3           c/pinctrl/pdm/pdm-clk0m0-sleep           t/pinctrl/pdm/pdm-clk0m1-sleep           /pinctrl/pdm/pdm-clk1-sleep         /pinctrl/pdm/pdm-sdi0m0-sleep           /pinctrl/pdm/pdm-sdi0m1-sleep           /pinctrl/pdm/pdm-sdi1-sleep         /pinctrl/pdm/pdm-sdi2-sleep         /pinctrl/pdm/pdm-sdi3-sleep         /pinctrl/i2s0/i2s0-8ch-mclk         /pinctrl/i2s0/i2s0-8ch-sclktx           /pinctrl/i2s0/i2s0-8ch-sclkrx           /pinctrl/i2s0/i2s0-8ch-lrcktx           !/pinctrl/i2s0/i2s0-8ch-lrckrx           1/pinctrl/i2s0/i2s0-8ch-sdo0         ?/pinctrl/i2s0/i2s0-8ch-sdo1         M/pinctrl/i2s0/i2s0-8ch-sdo2         [/pinctrl/i2s0/i2s0-8ch-sdo3         i/pinctrl/i2s0/i2s0-8ch-sdi0         w/pinctrl/i2s0/i2s0-8ch-sdi1         /pinctrl/i2s0/i2s0-8ch-sdi2         /pinctrl/i2s0/i2s0-8ch-sdi3         /pinctrl/i2s1/i2s1-2ch-mclk         /pinctrl/i2s1/i2s1-2ch-sclk         /pinctrl/i2s1/i2s1-2ch-lrck         /pinctrl/i2s1/i2s1-2ch-sdi          /pinctrl/i2s1/i2s1-2ch-sdo          /pinctrl/i2s2/i2s2-2ch-mclk         /pinctrl/i2s2/i2s2-2ch-sclk         /pinctrl/i2s2/i2s2-2ch-lrck         /pinctrl/i2s2/i2s2-2ch-sdi          /pinctrl/i2s2/i2s2-2ch-sdo          )/pinctrl/sdmmc/sdmmc-clk            3/pinctrl/sdmmc/sdmmc-cmd            =/pinctrl/sdmmc/sdmmc-det            G/pinctrl/sdmmc/sdmmc-bus1           R/pinctrl/sdmmc/sdmmc-bus4           ]/pinctrl/sdio/sdio-clk          f/pinctrl/sdio/sdio-cmd          o/pinctrl/sdio/sdio-bus4         y/pinctrl/emmc/emmc-clk          /pinctrl/emmc/emmc-cmd          /pinctrl/emmc/emmc-rstnout          /pinctrl/emmc/emmc-bus1         /pinctrl/emmc/emmc-bus4         /pinctrl/emmc/emmc-bus8         /pinctrl/emmc/emmc-reset            /pinctrl/flash/flash-cs0            /pinctrl/flash/flash-rdy            /pinctrl/flash/flash-dqs            /pinctrl/flash/flash-ale            /pinctrl/flash/flash-cle            /pinctrl/flash/flash-wrn            /pinctrl/flash/flash-csl            /pinctrl/flash/flash-rdn            /pinctrl/flash/flash-bus8           /pinctrl/sfc/sfc-bus4           %/pinctrl/sfc/sfc-bus2           ./pinctrl/sfc/sfc-cs0            6/pinctrl/sfc/sfc-clk             >/pinctrl/lcdc/lcdc-rgb-dclk-pin       $  P/pinctrl/lcdc/lcdc-rgb-m0-hsync-pin       $  f/pinctrl/lcdc/lcdc-rgb-m0-vsync-pin       "  |/pinctrl/lcdc/lcdc-rgb-m0-den-pin         '  /pinctrl/lcdc/lcdc-rgb888-m0-data-pins        '  /pinctrl/lcdc/lcdc-rgb666-m0-data-pins        '  /pinctrl/lcdc/lcdc-rgb565-m0-data-pins        '  /pinctrl/lcdc/lcdc-rgb888-m1-data-pins        '  /pinctrl/lcdc/lcdc-rgb666-m1-data-pins        '  /pinctrl/lcdc/lcdc-rgb565-m1-data-pins          &/pinctrl/pwm0/pwm0-pin          //pinctrl/pwm1/pwm1-pin          8/pinctrl/pwm2/pwm2-pin          A/pinctrl/pwm3/pwm3-pin          J/pinctrl/pwm4/pwm4-pin          S/pinctrl/pwm5/pwm5-pin          \/pinctrl/pwm6/pwm6-pin          e/pinctrl/pwm7/pwm7-pin          n/pinctrl/gmac/rmii-pins         x/pinctrl/gmac/mac-refclk-12ma           /pinctrl/gmac/mac-refclk            /pinctrl/cif-m0/cif-clkout-m0           /pinctrl/cif-m0/dvp-d2d9-m0         /pinctrl/cif-m0/dvp-d0d1-m0         /pinctrl/cif-m0/d10-d11-m0          /pinctrl/cif-m1/cif-clkout-m1           /pinctrl/cif-m1/dvp-d2d9-m1         /pinctrl/cif-m1/dvp-d0d1-m1         /pinctrl/cif-m1/d10-d11-m1          /pinctrl/isp/isp-prelight           /pinctrl/ethernet/phy-rst           /pinctrl/leds/module-led-pin            /pinctrl/leds/sd-card-led-pin           //pinctrl/pmic/pmic-int           8/pinctrl/haikou/haikou-keys-pin         H/pinctrl/uart/uart5-rts-pin         V/emmc-pwrseq            b/leds/led-0         m/leds/led-1         y/regulator-vccsys         $  /i2s0-sound/simple-audio-card,codec         /sgtl5000-oscillator            /regulator-dc-12v           /regulator-vcc3v3-baseboard         /regulator-vcc5v0-baseboard         /regulator-vdda-codec           /regulator-vddd-codec            	compatible interrupt-parent #address-cells #size-cells model i2c0 i2c1 i2c2 i2c3 serial0 serial1 serial2 serial3 serial4 serial5 spi0 spi1 i2c10 mmc0 mmc1 rtc0 rtc1 ethernet0 mmc2 device_type reg enable-method clocks #cooling-cells cpu-idle-states dynamic-power-coefficient operating-points-v2 cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend interrupts interrupt-affinity ports status clock-frequency clock-output-names #clock-cells polling-delay-passive polling-delay sustainable-power thermal-sensors temperature hysteresis trip cooling-device contribution #power-domain-cells pm_qos pmuio1-supply pmuio2-supply offset mode-bootloader mode-fastboot mode-loader mode-normal mode-recovery clock-names dmas dma-names reg-shift reg-io-width pinctrl-names pinctrl-0 rockchip,grf resets reset-names #sound-dai-cells rockchip,trcm-sync-tx-only #interrupt-cells interrupt-controller vccio1-supply vccio2-supply vccio3-supply vccio4-supply vccio5-supply vccio6-supply vccio-oscgpi-supply phys phy-names rockchip,output remote-endpoint rts-gpios system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc9-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-always-on regulator-boot-on regulator-on-in-suspend regulator-suspend-microvolt regulator-off-in-suspend VDDA-supply VDDIO-supply VDDD-supply pagesize vcc-supply num-cs cs-gpios #pwm-cells arm,pl330-periph-burst #dma-cells assigned-clocks assigned-clock-rates rockchip,hw-tshut-temp pinctrl-1 pinctrl-2 #thermal-sensor-cells #io-channel-cells vref-supply bits #reset-cells assigned-clock-parents #phy-cells interrupt-names power-domains dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size phy-mode phy-handle phy-supply clock_in_out reset-assert-us reset-deassert-us reset-gpios bus-width fifo-depth max-frequency vqmmc-supply sd-uhs-sdr12 sd-uhs-sdr25 sd-uhs-sdr50 cap-mmc-highspeed cap-sd-highspeed cd-gpios disable-wp vmmc-supply mmc-hs200-1_8v mmc-pwrseq non-removable iommus #iommu-cells rockchip,disable-mmu-reset rockchip,pmu ranges gpio-controller #gpio-cells output-high line-name gpio-hog input bias-pull-up bias-pull-down bias-disable drive-strength input-schmitt-enable output-low input-enable rockchip,pins vout-supply function linux,default-trigger color stdout-path label linux,code linux,input-type simple-audio-card,format simple-audio-card,name simple-audio-card,mclk-fs simple-audio-card,frame-master simple-audio-card,bitclock-master sound-dai system-clock-fixed vin-supply cpu0 cpu1 cpu2 cpu3 CPU_SLEEP CLUSTER_SLEEP cpu0_opp_table display_subsystem gmac_clkin thermal_zones soc_thermal threshold target soc_crit gpu_thermal gpu_threshold gpu_target gpu_crit xin24m pmugrf pmu_io_domains uart0 i2s0_8ch i2s1_2ch i2s2_2ch gic lvds lvds_in lvds_vopb_in lvds_vopl_in lvds_out uart1 uart2 uart3 uart4 uart5 rk809 vdd_log vdd_arm vcc_ddr vcc_3v0_1v8 vcc_emmc vcc_3v3 vcc_1v8 vcc_1v0 vccio_sd vcc_lcd vcc_1v8_lcd vcca_1v8 vg_attiny_updi fan rtc_twi sgtl5000 wdt pwm0 pwm1 pwm2 pwm3 pwm4 pwm5 pwm6 pwm7 rktimer dmac tsadc saradc otp cpu_id cpu_leakage performance cru pmucru usb2phy_grf u2phy u2phy_host u2phy_otg dsi_dphy csi_dphy usb20_otg usb_host0_ehci usb_host0_ohci gmac mdio dp83825 sdmmc sdio sfc nfc gpu_opp_table gpu vpu vpu_mmu dsi dsi_in dsi_in_vopb dsi_in_vopl dsi_out vopb_out vopb_out_dsi vopb_out_lvds vopb_mmu vopl_out vopl_out_dsi vopl_out_lvds vopl_mmu isp isp_in isp_mmu qos_gmac qos_gpu qos_sdmmc qos_emmc qos_nand qos_sdio qos_sfc qos_usb_host qos_usb_otg qos_isp_128 qos_isp_rd qos_isp_wr qos_isp_m1 qos_vip qos_rga_rd qos_rga_wr qos_vop_m0 qos_vop_m1 qos_vpu qos_vpu_r128 pinctrl gpio0 gpio1 gpio2 gpio3 pcfg_pull_up pcfg_pull_down pcfg_pull_none pcfg_pull_none_2ma pcfg_pull_up_2ma pcfg_pull_up_4ma pcfg_pull_none_4ma pcfg_pull_down_4ma pcfg_pull_none_8ma pcfg_pull_up_8ma pcfg_pull_none_12ma pcfg_pull_up_12ma pcfg_pull_none_smt pcfg_output_high pcfg_output_low pcfg_input_high pcfg_input i2c0_xfer i2c1_xfer i2c2_xfer i2c3_xfer tsadc_otp_pin tsadc_otp_out uart0_xfer uart0_cts uart0_rts uart1_xfer uart1_cts uart1_rts uart2m0_xfer uart2m1_xfer uart3m0_xfer uart3m0_cts uart3m0_rts uart3m1_xfer uart3m1_cts uart3m1_rts uart4_xfer uart4_cts uart4_rts uart5_xfer uart5_cts uart5_rts spi0_clk spi0_csn spi0_miso spi0_mosi spi0_clk_hs spi0_miso_hs spi0_mosi_hs spi1_clk spi1_csn0 spi1_csn1 spi1_miso spi1_mosi spi1_clk_hs spi1_miso_hs spi1_mosi_hs spi1_csn0_gpio_pin spi1_csn1_gpio_pin pdm_clk0m0 pdm_clk0m1 pdm_clk1 pdm_sdi0m0 pdm_sdi0m1 pdm_sdi1 pdm_sdi2 pdm_sdi3 pdm_clk0m0_sleep pdm_clk0m_sleep1 pdm_clk1_sleep pdm_sdi0m0_sleep pdm_sdi0m1_sleep pdm_sdi1_sleep pdm_sdi2_sleep pdm_sdi3_sleep i2s0_8ch_mclk i2s0_8ch_sclktx i2s0_8ch_sclkrx i2s0_8ch_lrcktx i2s0_8ch_lrckrx i2s0_8ch_sdo0 i2s0_8ch_sdo1 i2s0_8ch_sdo2 i2s0_8ch_sdo3 i2s0_8ch_sdi0 i2s0_8ch_sdi1 i2s0_8ch_sdi2 i2s0_8ch_sdi3 i2s1_2ch_mclk i2s1_2ch_sclk i2s1_2ch_lrck i2s1_2ch_sdi i2s1_2ch_sdo i2s2_2ch_mclk i2s2_2ch_sclk i2s2_2ch_lrck i2s2_2ch_sdi i2s2_2ch_sdo sdmmc_clk sdmmc_cmd sdmmc_det sdmmc_bus1 sdmmc_bus4 sdio_clk sdio_cmd sdio_bus4 emmc_clk emmc_cmd emmc_rstnout emmc_bus1 emmc_bus4 emmc_bus8 emmc_reset flash_cs0 flash_rdy flash_dqs flash_ale flash_cle flash_wrn flash_csl flash_rdn flash_bus8 sfc_bus4 sfc_bus2 sfc_cs0 sfc_clk lcdc_rgb_dclk_pin lcdc_rgb_m0_hsync_pin lcdc_rgb_m0_vsync_pin lcdc_rgb_m0_den_pin lcdc_rgb888_m0_data_pins lcdc_rgb666_m0_data_pins lcdc_rgb565_m0_data_pins lcdc_rgb888_m1_data_pins lcdc_rgb666_m1_data_pins lcdc_rgb565_m1_data_pins pwm0_pin pwm1_pin pwm2_pin pwm3_pin pwm4_pin pwm5_pin pwm6_pin pwm7_pin rmii_pins mac_refclk_12ma mac_refclk cif_clkout_m0 dvp_d2d9_m0 dvp_d0d1_m0 dvp_d10d11_m0 cif_clkout_m1 dvp_d2d9_m1 dvp_d0d1_m1 dvp_d10d11_m1 isp_prelight phy_rst module_led_pin sd_card_led_pin pmic_int haikou_keys_pin uart5_rts_pin emmc_pwrseq module_led sd_card_led vcc5v0_sys sgtl5000_codec sgtl5000_clk dc_12v vcc3v3_baseboard vcc5v0_baseboard vdda_codec vddd_codec 