     8     (            	f                               9    tsd,px30-cobra-ltk050h3148w tsd,px30-cobra rockchip,px30                                     +         2   7Theobroma Systems Cobra with ltk050h3148w Display      aliases          =/i2c@ff180000            B/i2c@ff190000            G/i2c@ff1a0000            L/i2c@ff1b0000            Q/serial@ff030000             Y/serial@ff158000             a/serial@ff160000             i/serial@ff168000             q/serial@ff170000             y/serial@ff178000             /spi@ff1d0000            /spi@ff1d8000            /ethernet@ff360000           /mmc@ff390000         cpus                         +       cpu@0            cpu           arm,cortex-a35                            psci                                                          Z                                        cpu@1            cpu           arm,cortex-a35                           psci                                                          Z                                        cpu@2            cpu           arm,cortex-a35                           psci                                                          Z                                  	      cpu@3            cpu           arm,cortex-a35                           psci                                                          Z                                  
      idle-states         psci       cpu-sleep             arm,idle-state           ,        =           T   x        e           u                   cluster-sleep             arm,idle-state           ,        =          T          e          u                         opp-table-0           operating-points-v2                        opp-600000000               #F          ~ ~ p          @               opp-816000000               0,            p          @      opp-1008000000              <            p          @      opp-1200000000              G              p          @      opp-1296000000              M?d          p p p          @         arm-pmu           arm,cortex-a35-pmu        0         d          e          f          g                    	   
      display-subsystem             rockchip,display-subsystem                        okay          external-gmac-clock           fixed-clock                 gmac_clkin                    psci              arm,psci-1.0             smc       timer             arm,armv8-timer       0                                
        thermal-zones      soc-thermal                    4          B          T          trips      trip-point-0            d p        p           passive       trip-point-1            d L        p           passive                  soc-crit            d 8        p        	   critical             cooling-maps       map0            {                                     gpu-thermal            d        4          T         trips      gpu-threshold           d p        p           passive       gpu-target          d L        p           passive                  gpu-crit            d 8        p        	   critical             cooling-maps       map0            {                             xin24m            fixed-clock                     n6         xin24m             m      power-management@ff000000         $    rockchip,px30-pmu syscon simple-mfd                           power-controller              rockchip,px30-power-controller                                  +               o   power-domain@5                                       <                                power-domain@7                                   ;                             power-domain@9              	                     C      @      ?                             power-domain@10             
      @                                9      7      8      :                                      power-domain@11                                        K                                power-domain@12                   X                                                        D      5      6                                      power-domain@13                   (                                 3                  !   "   #                  power-domain@14                            I           $                        syscon@ff010000       '    rockchip,px30-pmugrf syscon simple-mfd                                      io-domains        $    rockchip,px30-pmu-io-voltage-domain         okay               %           %      reboot-mode           syscon-reboot-mode                     RB        RB	        RB        RB         RB         serial@ff030000       $    rockchip,px30-uart snps,dw-apb-uart                                                     &      &           baudclk apb_pclk            *   '       '           /tx rx           9           C           Pdefault         ^   (   )   *      	  disabled          i2s@ff060000              rockchip,px30-i2s-tdm                                                                             mclk_tx mclk_rx hclk            *   '      '           /tx rx           h   +        u                  
  |tx-m rx-m           Pdefault       0  ^   ,   -   .   /   0   1   2   3   4   5   6   7                  	  disabled          i2s@ff070000          &    rockchip,px30-i2s rockchip,rk3066-i2s                                                                       i2s_clk i2s_hclk            *   '      '           /tx rx           Pdefault         ^   8   9   :   ;                  	  disabled          i2s@ff080000          &    rockchip,px30-i2s rockchip,rk3066-i2s                                                                       i2s_clk i2s_hclk            *   '      '           /tx rx           Pdefault         ^   <   =   >   ?                  	  disabled          interrupt-controller@ff131000             arm,gic-400                                        @                                 @             `                       	                   syscon@ff140000       $    rockchip,px30-grf syscon simple-mfd                                  +   io-domains             rockchip,px30-io-voltage-domain         okay               @           A           %           %           B           C      lvds              rockchip,px30-lvds             D        dphy            h   +        "lvds          	  disabled       ports                        +       port@0                                    +       endpoint@0                       2   E                 endpoint@1                      2   F                    port@1                             serial@ff158000       $    rockchip,px30-uart snps,dw-apb-uart                                                            I        baudclk apb_pclk            9           C           Pdefault         ^   G        okay          serial@ff160000       $    rockchip,px30-uart snps,dw-apb-uart                                                             J        baudclk apb_pclk            *   '      '           /tx rx           9           C           Pdefault         ^   H      	  disabled          serial@ff168000       $    rockchip,px30-uart snps,dw-apb-uart                                                            K        baudclk apb_pclk            *   '      '           /tx rx           9           C           Pdefault         ^   I   J   K      	  disabled          serial@ff170000       $    rockchip,px30-uart snps,dw-apb-uart                                                             L        baudclk apb_pclk            *   '      '   	        /tx rx           9           C           Pdefault         ^   L   M   N      	  disabled          serial@ff178000       $    rockchip,px30-uart snps,dw-apb-uart                                                            M        baudclk apb_pclk            *   '   
   '           /tx rx           9           C           Pdefault         ^   O        okay          i2c@ff180000          &    rockchip,px30-i2c rockchip,rk3399-i2c                                             N      	  i2c pclk                              Pdefault         ^   P                     +            okay       pmic@20           rockchip,rk809                                   xin32k              Q                      Pdefault         ^   R         B         Z        h   S        t   S           S           S           %           %           %           S   regulators     DCDC_REG1           vdd_log                            ~         p        -  q              regulator-state-mem          B        Z ~         DCDC_REG2           vdd_arm                            ~         p        -  q              regulator-state-mem          v        Z ~         DCDC_REG3           vcc_ddr                      regulator-state-mem          B         DCDC_REG4           vcc_3v0_1v8                            -         -           C   regulator-state-mem          B        Z -         DCDC_REG5           vcc_3v3                            2Z         2Z           %   regulator-state-mem          B        Z 2Z         LDO_REG2            vcc_1v8                            w@         w@           B   regulator-state-mem          B        Z w@         LDO_REG3            vcc_1v0                            B@         B@   regulator-state-mem          B        Z B@         LDO_REG4            vcc_2v8                            *         *           V   regulator-state-mem          v        Z *         LDO_REG5          	  vccio_sd                               -         -           A   regulator-state-mem          B        Z -         LDO_REG6          	  vcc_sdio                               -         -           @   regulator-state-mem          B        Z 2Z         LDO_REG7            vcc_lcd                            B@         B@   regulator-state-mem          v        Z B@         LDO_REG8            vcc_1v8_lcd                            w@         w@   regulator-state-mem          B        Z w@         LDO_REG9          	  vcca_1v8                               w@         w@   regulator-state-mem          v        Z w@                  i2c@ff190000          &    rockchip,px30-i2c rockchip,rk3399-i2c                                             O      	  i2c pclk                              Pdefault         ^   T                     +            okay                   i2c@ff1a0000          &    rockchip,px30-i2c rockchip,rk3399-i2c                                             P      	  i2c pclk                   	           Pdefault         ^   U                     +            okay                        2          ,   touchscreen@14            goodix,gt911                           V            Q                         Q               Pdefault         ^   W   X           Q                           %         i2c@ff1b0000          &    rockchip,px30-i2c rockchip,rk3399-i2c                                              Q      	  i2c pclk                   
           Pdefault         ^   Y                     +          	  disabled          spi@ff1d0000          &    rockchip,px30-spi rockchip,rk3066-spi                                                          $     U        spiclk apb_pclk         *   '      '           /tx rx                      Pdefault         ^   Z   [   \   ]                     +          	  disabled          spi@ff1d8000          &    rockchip,px30-spi rockchip,rk3066-spi                                                         %     V        spiclk apb_pclk         *   '      '           /tx rx                      Pdefault         ^   ^   _   `   a   b                     +          	  disabled          watchdog@ff1e0000             rockchip,px30-wdt snps,dw-wdt                                       [               %           okay          pwm@ff200000          &    rockchip,px30-pwm rockchip,rk3328-pwm                                         "     S      	  pwm pclk            Pdefault         ^   c                   okay                     pwm@ff200010          &    rockchip,px30-pwm rockchip,rk3328-pwm                                        "     S      	  pwm pclk            Pdefault         ^   d                   okay                     pwm@ff200020          &    rockchip,px30-pwm rockchip,rk3328-pwm                                         "     S      	  pwm pclk            Pdefault         ^   e                 	  disabled          pwm@ff200030          &    rockchip,px30-pwm rockchip,rk3328-pwm                  0                      "     S      	  pwm pclk            Pdefault         ^   f                 	  disabled          pwm@ff208000          &    rockchip,px30-pwm rockchip,rk3328-pwm                                        #     T      	  pwm pclk            Pdefault         ^   g                 	  disabled          pwm@ff208010          &    rockchip,px30-pwm rockchip,rk3328-pwm                                       #     T      	  pwm pclk            Pdefault         ^   h                   okay                     pwm@ff208020          &    rockchip,px30-pwm rockchip,rk3328-pwm                                        #     T      	  pwm pclk            Pdefault         ^   i                   okay                     pwm@ff208030          &    rockchip,px30-pwm rockchip,rk3328-pwm                 0                      #     T      	  pwm pclk            Pdefault         ^   j                   okay                     timer@ff210000        *    rockchip,px30-timer rockchip,rk3288-timer                !                                         Y      &        pclk timer        dma-controller@ff240000           arm,pl330 arm,primecell              $        @                                                           	  apb_pclk            /              '      tsadc@ff280000            rockchip,px30-tsadc              (                        $           :      ,        J  P               ,     X        tsadc apb_pclk          u            
  |tsadc-apb           h   +        _         Pinit default sleep          ^   k        v   l           k                   okay                     saradc@ff288000       ,    rockchip,px30-saradc rockchip,rk3399-saradc              (                       T                             -     W        saradc apb_pclk         u              |saradc-apb          okay               B      nvmem@ff290000            rockchip,px30-otp                )        @                /     Z     a        otp apb_pclk phy            u              |phy                      +      id@7                         cpu-leakage@17                       performance@1e                                        clock-controller@ff2b0000             rockchip,px30-cru                +                     m   &           xin24m gpll         h   +                            8  :                                   @      I        JFq   рр                   clock-controller@ff2bc000             rockchip,px30-pmucru                 +                    m        xin24m          h   +                              :   &      &      &           JG             &      syscon@ff2c0000       ,    rockchip,px30-usb2phy-grf syscon simple-mfd              ,                              +      usb2phy@100           rockchip,px30-usb2phy                               &   
        phyclk                      :                 n        usb480m_phy         okay               n   host-port                              D         
  linestate           okay               q      otg-port                      $         B          A          @           otg-bvalid otg-id linestate         okay               p            phy@ff2e0000              rockchip,px30-dsi-dphy               .                     &        E      	  ref pclk            u      >        |apb                        o           okay               D      phy@ff2f0000              rockchip,px30-csi-dphy               /        @               F        pclk                           o           u      /        |apb         h   +      	  disabled                     usb@ff300000          0    rockchip,px30-usb rockchip,rk3066-usb snps,dwc2              0                        >                         otg         otg                    *          9            @                  p      	  usb2-phy               o           okay          usb@ff340000              generic-ehci                 4                        <                            q        usb            o           okay          usb@ff350000              generic-ohci                 5                        =                            q        usb            o           okay          ethernet@ff360000             rockchip,px30-gmac               6                        +           macirq        @         >      ?      ?      @      A           C      L      [  stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac clk_mac_speed          h   +        Hrmii            Pdefault         ^   r   s           o   	        u      ^      
  |stmmaceth           okay            Qoutput          ^   t        i   %   mdio              snps,dwmac-mdio                      +       ethernet-phy@0            ethernet-phy-ieee802.3-c22                       Pdefault         ^   u        t  P          P           v                 t            mmc@ff370000          .    rockchip,px30-dw-mshc rockchip,rk3288-dw-mshc                7        @                6                         ;      C      D        biu ciu ciu-drive ciu-sample                                  р        Pdefault         ^   w   x   y   z           o         	  disabled          mmc@ff380000          .    rockchip,px30-dw-mshc rockchip,rk3288-dw-mshc                8        @                7                         8      E      F        biu ciu ciu-drive ciu-sample                                  р        Pdefault         ^   {   |   }           o   
      	  disabled          mmc@ff390000          .    rockchip,px30-dw-mshc rockchip,rk3288-dw-mshc                9        @                5                         9      G      H        biu ciu ciu-drive ciu-sample                                  р        Pdefault         ^   ~                 o   
        okay                                            %           C      spi@ff3a0000              rockchip,sfc                 :        @                8                  :             clk_sfc hclk_sfc            ^                 Pdefault            o   
      	  disabled          nand-controller@ff3b0000              rockchip,px30-nfc                ;        @                9                        7        ahb nfc         :      7        Jр        Pdefault          ^                                   o   
      	  disabled          opp-table-1           operating-points-v2               opp-200000000                         ~      opp-300000000                               opp-400000000               ׄ                opp-480000000               8          *         gpu@ff400000          $    rockchip,px30-mali arm,mali-bifrost              @        @       $         /          .          -           job mmu gpu                I                       o                       okay                                video-codec@ff442000              rockchip,px30-vpu                D                        P          O         
  vepu vdpu                              
  aclk hclk           	              o         iommu@ff442800            rockchip,iommu               D(                       Q                                aclk iface                         o                    dsi@ff450000          (    rockchip,px30-mipi-dsi snps,dw-mipi-dsi              E                        K                 D        pclk               D        dphy               o           u      =        |apb         h   +        okay                         +       ports                        +       port@0                                    +       endpoint@0                       2                    endpoint@1                      2                       port@1                 endpoint            2                          panel@0           leadtek,ltk050h3148w                                    '   B        Pdefault         ^              Q   
           4   V   port       endpoint            2                             vop@ff460000              rockchip,px30-vop-big                F                       M                                      aclk_vop dclk_vop hclk_vop          u      3      4      5        |axi ahb dclk            	              o           okay       port                         +                  endpoint@0                       2                    endpoint@1                      2              E            iommu@ff460f00            rockchip,iommu               F                       M                                aclk iface             o                       okay                     vop@ff470000              rockchip,px30-vop-lit                G                       N                                      aclk_vop dclk_vop hclk_vop          u      7      8      9        |axi ahb dclk            	              o         	  disabled       port                         +                  endpoint@0                       2                    endpoint@1                      2              F            iommu@ff470f00            rockchip,iommu               G                       N                                aclk iface             o                     	  disabled                     isp@ff4a0000              rockchip,px30-cif-isp                J               $         F          I          J           isp mi mipi                 3                 _        isp aclk hclk pclk          	                      dphy               o         	  disabled       ports                        +       port@0                           iommu@ff4a8000            rockchip,iommu               J                       F                                aclk iface             o            ?                             qos@ff518000              rockchip,px30-qos syscon                 Q                          qos@ff520000              rockchip,px30-qos syscon                 R                     $      qos@ff52c000              rockchip,px30-qos syscon                 R                          qos@ff538000              rockchip,px30-qos syscon                 S                          qos@ff538080              rockchip,px30-qos syscon                 S                         qos@ff538100              rockchip,px30-qos syscon                 S                          qos@ff538180              rockchip,px30-qos syscon                 S                         qos@ff540000              rockchip,px30-qos syscon                 T                           qos@ff540080              rockchip,px30-qos syscon                 T                          qos@ff548000              rockchip,px30-qos syscon                 T                          qos@ff548080              rockchip,px30-qos syscon                 T                          qos@ff548100              rockchip,px30-qos syscon                 T                    !      qos@ff548180              rockchip,px30-qos syscon                 T                   "      qos@ff548200              rockchip,px30-qos syscon                 T                    #      qos@ff550000              rockchip,px30-qos syscon                 U                           qos@ff550080              rockchip,px30-qos syscon                 U                          qos@ff550100              rockchip,px30-qos syscon                 U                          qos@ff550180              rockchip,px30-qos syscon                 U                         qos@ff558000              rockchip,px30-qos syscon                 U                          qos@ff558080              rockchip,px30-qos syscon                 U                         pinctrl           rockchip,px30-pinctrl           h   +        Z                        +            g        Pdefault         ^      gpio@ff040000             rockchip,gpio-bank                                                      &            n        ~                                  Q      gpio@ff250000             rockchip,gpio-bank               %                                         \         n        ~                                        gpio@ff260000             rockchip,gpio-bank               &                                         ]         n        ~                                  v      gpio@ff270000             rockchip,gpio-bank               '                                         ^         n        ~                             pcfg-pull-up                              pcfg-pull-down                            pcfg-pull-none                            pcfg-pull-none-2ma                            pcfg-pull-up-2ma                              pcfg-pull-up-4ma                                         pcfg-pull-none-4ma                            pcfg-pull-down-4ma                            pcfg-pull-none-8ma                                       pcfg-pull-up-8ma                                         pcfg-pull-none-12ma                                      pcfg-pull-up-12ma                                        pcfg-pull-none-smt                                     pcfg-output-high                              pcfg-output-low                pcfg-input-high                                    pcfg-input                 i2c0       i2c0-xfer                                	                 P         i2c1       i2c1-xfer                                                 T         i2c2       i2c2-xfer                                               U         i2c3       i2c3-xfer                                               Y         tsadc      tsadc-otp-pin                                    k      tsadc-otp-out                                   l         uart0      uart0-xfer                  
                              (      uart0-cts                                   )      uart0-rts                                   *         uart1      uart1-xfer                                              G      uart1-cts                             uart1-rts                                uart2-m0       uart2m0-xfer                                                H         uart2-m1       uart2m1-xfer                                              uart3-m0       uart3m0-xfer                                             uart3m0-cts                            uart3m0-rts                               uart3-m1       uart3m1-xfer                                                I      uart3m1-cts                                J      uart3m1-rts                                K         uart4      uart4-xfer                                              L      uart4-cts                                  M      uart4-rts                                  N         uart5      uart5-xfer                                              O      uart5-cts                             uart5-rts                                spi0       spi0-clk                                   Z      spi0-csn                                   [      spi0-miso                                  \      spi0-mosi                                  ]      spi0-clk-hs                           spi0-miso-hs                              spi0-mosi-hs                                 spi1       spi1-clk                                   ^      spi1-csn0                 	                 _      spi1-csn1                 
                 `      spi1-miso                                  a      spi1-mosi                                  b      spi1-clk-hs                           spi1-miso-hs                              spi1-mosi-hs                                 pdm    pdm-clk0m0                            pdm-clk0m1                            pdm-clk1                              pdm-sdi0m0                            pdm-sdi0m1                            pdm-sdi1                              pdm-sdi2                              pdm-sdi3                              pdm-clk0m0-sleep                               pdm-clk0m1-sleep                               pdm-clk1-sleep                             pdm-sdi0m0-sleep                               pdm-sdi0m1-sleep                               pdm-sdi1-sleep                             pdm-sdi2-sleep                             pdm-sdi3-sleep                                i2s0       i2s0-8ch-mclk                             i2s0-8ch-sclktx                                ,      i2s0-8ch-sclkrx                                -      i2s0-8ch-lrcktx                                .      i2s0-8ch-lrckrx                                /      i2s0-8ch-sdo0                                  0      i2s0-8ch-sdo1                                  2      i2s0-8ch-sdo2                                  4      i2s0-8ch-sdo3                                  6      i2s0-8ch-sdi0                                  1      i2s0-8ch-sdi1                                  3      i2s0-8ch-sdi2                 	                 5      i2s0-8ch-sdi3                                  7         i2s1       i2s1-2ch-mclk                             i2s1-2ch-sclk                                  8      i2s1-2ch-lrck                                  9      i2s1-2ch-sdi                                   :      i2s1-2ch-sdo                                   ;         i2s2       i2s2-2ch-mclk                             i2s2-2ch-sclk                                  <      i2s2-2ch-lrck                                  =      i2s2-2ch-sdi                                   >      i2s2-2ch-sdo                                   ?         sdmmc      sdmmc-clk                                  w      sdmmc-cmd                                  x      sdmmc-det                                   y      sdmmc-bus1                            sdmmc-bus4        @                                                             z         sdio       sdio-clk                                   }      sdio-cmd                                   |      sdio-bus4         @                                                             {         emmc       emmc-clk                  	                 ~      emmc-cmd                  
                       emmc-rstnout                              emmc-bus1                              emmc-bus4         @                                                         emmc-bus8                                                                                                                             emmc-reset                                           flash      flash-cs0                                        flash-rdy                 	                       flash-dqs                 
                       flash-ale                                        flash-cle                                        flash-wrn                                        flash-csl                             flash-rdn                                        flash-bus8                                                                                                                               sfc    sfc-bus4          @                                                                    sfc-bus2                                            sfc-cs0                                      sfc-clk               	                          lcdc       lcdc-rgb-dclk-pin                              lcdc-rgb-m0-hsync-pin                             lcdc-rgb-m0-vsync-pin                             lcdc-rgb-m0-den-pin                           lcdc-rgb888-m0-data-pins                                                                             
            	                                                                                                                                                                                                                        lcdc-rgb666-m0-data-pins                                                                              
            	                                                                                                                                                lcdc-rgb565-m0-data-pins                                                                              
            	                                                                                                                        lcdc-rgb888-m1-data-pins                                                     
                                                                                                                                                                        lcdc-rgb666-m1-data-pins                                                      
                                                                                                lcdc-rgb565-m1-data-pins                                                      
                                                                           pwm0       pwm0-pin                                    c         pwm1       pwm1-pin                                    d         pwm2       pwm2-pin                                   e         pwm3       pwm3-pin                                    f         pwm4       pwm4-pin                                   g         pwm5       pwm5-pin                                   h         pwm6       pwm6-pin                                   i         pwm7       pwm7-pin                                   j         gmac       rmii-pins                                                                                                                  	                 r      mac-refclk-12ma               
                 s      mac-refclk                
               cif-m0     cif-clkout-m0                             dvp-d2d9-m0                                                                                                                            	            
                        dvp-d0d1-m0                                        d10-d11-m0                                            cif-m1     cif-clkout-m1                             dvp-d2d9-m1                                                               	                                                                                                dvp-d0d1-m1                                        d10-d11-m1                                            isp    isp-prelight                                 hog    cobra-pin-hog         P                                                                                         ethernet       phy-rst                                 u         leds       heartbeat-led-pin                                              panel      dsp-rst                
                        tch-int                                  W      tch-rst                                  X         pmic       pmic-int                                     R            chosen          		serial5:115200n8          backlight             pwm-backlight           	   S        	"         a                     beeper            pwm-beeper          	"                   emmc-pwrseq           mmc-pwrseq-emmc         ^           Pdefault                                    gpio-leds         
    gpio-leds           Pdefault         ^      led-0           	'              Q              
  	-heartbeat         
  	3heartbeat            pwm-leds          	    pwm-leds       led-0           	'           	Ioff       	  	-ring_red            	"        B@            	W         led-1           	'           	Ioff         	-ring_green          	"        B@            	W         led-2           	'           	Ioff       
  	-ring_blue           	"        B@            	W            regulator-vccsys              regulator-fixed         vcc5v0_sys                             LK@         LK@           S         	compatible interrupt-parent #address-cells #size-cells model i2c0 i2c1 i2c2 i2c3 serial0 serial1 serial2 serial3 serial4 serial5 spi0 spi1 ethernet0 mmc0 device_type reg enable-method clocks #cooling-cells cpu-idle-states dynamic-power-coefficient operating-points-v2 cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend interrupts interrupt-affinity ports status clock-frequency clock-output-names #clock-cells polling-delay-passive polling-delay sustainable-power thermal-sensors temperature hysteresis trip cooling-device contribution #power-domain-cells pm_qos pmuio1-supply pmuio2-supply offset mode-bootloader mode-fastboot mode-loader mode-normal mode-recovery clock-names dmas dma-names reg-shift reg-io-width pinctrl-names pinctrl-0 rockchip,grf resets reset-names #sound-dai-cells #interrupt-cells interrupt-controller vccio1-supply vccio2-supply vccio3-supply vccio4-supply vccio5-supply vccio6-supply phys phy-names rockchip,output remote-endpoint system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc9-supply regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-on-in-suspend regulator-suspend-microvolt regulator-off-in-suspend i2c-scl-falling-time-ns i2c-scl-rising-time-ns AVDD28-supply irq-gpios reset-gpios touchscreen-inverted-x VDDIO-supply num-cs #pwm-cells arm,pl330-periph-burst #dma-cells assigned-clocks assigned-clock-rates rockchip,hw-tshut-temp pinctrl-1 pinctrl-2 #thermal-sensor-cells #io-channel-cells vref-supply bits #reset-cells assigned-clock-parents #phy-cells interrupt-names power-domains dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size phy-mode clock_in_out phy-handle phy-supply reset-assert-us reset-deassert-us bus-width fifo-depth max-frequency cap-mmc-highspeed mmc-pwrseq non-removable vmmc-supply vqmmc-supply mali-supply iommus #iommu-cells backlight iovcc-supply vci-supply rockchip,disable-mmu-reset rockchip,pmu ranges gpio-controller #gpio-cells bias-pull-up bias-pull-down bias-disable drive-strength input-schmitt-enable output-high output-low input-enable rockchip,pins stdout-path power-supply pwms color label linux,default-trigger default-state max-brightness 