  i   8  c`   (              c(                                                                   /   ,Qualcomm Technologies, Inc. IPQ9574/AP-AL02-C7        %   2qcom,ipq9574-ap-al02-c7 qcom,ipq9574       clocks     ref-48mhz-clk            2fixed-factor-clock           =            D             Q            [            f         sleep-clk            2fixed-clock          D             n  }          f         xo-board-clk             2fixed-factor-clock           =            D             Q            [            f         xo-clk           2fixed-clock          D             nl          f            cpus                                 cpu@0            ~cpu          2arm,cortex-a73                        psci                         =               cpu                                              f   '      cpu@1            ~cpu          2arm,cortex-a73                       psci                         =               cpu                                              f   (      cpu@2            ~cpu          2arm,cortex-a73                       psci                         =               cpu                                              f   )      cpu@3            ~cpu          2arm,cortex-a73                       psci                         =               cpu                                              f   *      l2-cache             2cache                                  f            firmware       scm          2qcom,scm-ipq9574 qcom,scm                a          memory@40000000          ~memory               @                 opp-table-cpu            2operating-points-v2-kryo-cpu                        	         f      opp-936000000           (    7:         /         =           N @      opp-1104000000          (    Aʹ         / ,        =           N @      opp-1200000000          (    G         / )$        =           N @      opp-1416000000          (    Tfr         / )$        =           N @      opp-1488000000          (    X         / H        =           N @      opp-1800000000          (    kI         / l        =           N @      opp-2208000000          (    h         / 6d        =           N @         pmu          2arm,cortex-a73-pmu          _              psci             2arm,psci-1.0             smc       remoteproc        $   2qcom,ipq9574-rpm-proc qcom,rpm-proc    glink-edge           2qcom,glink-rpm          _                  j   
        {          rpm-requests          $   2qcom,rpm-ipq9574 qcom,glink-smd-rpm         rpm_requests       regulators           2qcom,rpm-mp5496-regulators     s1                    g8         f         l2           w@         w@                        l5           w@         w@                           f                     reserved-memory                                      bootloader@4a100000              J       @                 sbl@4a500000                 JP                        tz@4a600000              J`       @                 smem@4aa00000         
   2qcom,smem                J                                         soc@0            2simple-bus                                                  sram@60000           2qcom,rpm-msg-ram                  `          f   
      phy@84000         !   2qcom,ipq9574-qmp-gen3x1-pcie-phy              @             =      H      T               aux cfg_ahb pipe                  H        1-         '                    .phy common           D            :gcc_pcie0_pipe_clk_src          M          	  Xdisabled             f         phy@8c000         !   2qcom,ipq9574-qmp-gen3x2-pcie-phy                            =      J      V               aux cfg_ahb pipe                  J        1-         '                    .phy common           D            :gcc_pcie2_pipe_clk_src          M            Xokay             f         rng@e3000            2qcom,ipq9574-trng qcom,trng           0             =      s         core          mdio@90000        $   2qcom,ipq9574-mdio qcom,ipq4019-mdio           	     d                                   =      r         gcc_mdio_ahb_clk          	  Xdisabled          phy@f4000         !   2qcom,ipq9574-qmp-gen3x2-pcie-phy              @              =      K      W               aux cfg_ahb pipe                  K        1-         '      !      "        .phy common           D            :gcc_pcie3_pipe_clk_src          M            Xokay             f         phy@fc000         !   2qcom,ipq9574-qmp-gen3x1-pcie-phy                           =      I      U               aux cfg_ahb pipe                  I        1-         '                    .phy common           D            :gcc_pcie1_pipe_clk_src          M            Xokay             f         clock-controller@9b000           2qcom,ipq9574-cmn-pll              	             =         w               ref ahb sys          D                          _   Ax          f         efuse@a4000           2qcom,ipq9574-qfprom qcom,qfprom           
@                               cpu-speed-bin@15                           x               f   	         dma-controller@704000             2qcom,bam-v1.7.4 qcom,bam-v1.7.0           p@            _                  }                                                      f         crypto@73a000         +   2qcom,ipq9574-qce qcom,ipq4019-qce qcom,qce            s   `          =                           iface bus core                              rx tx         thermal-sensor@4a9000         &   2qcom,ipq9574-tsens qcom,ipq8074-tsens             J     J            _                	  combined                                   f   %      pinctrl@1000000          2qcom,ipq9574-tlmm                0          _                                      "              A         .        C            f      uart2-state         Tgpio34 gpio35           Yblsp2_uart          b            q         f         spi-0-state         Tgpio11 gpio12 gpio13 gpio14       
  Yblsp0_spi           b            q         f         gpio-keys-default-state         Tgpio37          Ygpio            b            ~         f   .      gpio-leds-default-state         Tgpio64          Ygpio            b            ~         f   /      qpic-snand-default-state             f      clock-pins          Tgpio5         	  Yqspi_clk            b            q      cs-pins         Tgpio4           Yqspi_cs         b            q      data-pins           Tgpio0 gpio1 gpio2 gpio3       
  Yqspi_data           b            q         pcie1-default-state          f   "   clkreq-n-pins           Tgpio25        
  Ypcie1_clk           b            ~      perst-n-pins            Tgpio26          Ygpio            b                           wake-n-pins         Tgpio27          Ypcie1_wake          b            ~         pcie2-default-state          f   $   clkreq-n-pins           Tgpio28        
  Ypcie2_clk           b            ~      perst-n-pins            Tgpio29          Ygpio            b                           wake-n-pins         Tgpio30          Ypcie2_wake          b            ~         pcie3-default-state          f   #   clkreq-n-pins           Tgpio31        
  Ypcie3_clk           b            ~      perst-n-pins            Tgpio32          Ygpio            b            ~               wake-n-pins         Tgpio33          Ypcie3_wake          b            ~            clock-controller@1800000             2qcom,ipq9574-gcc                            =                                   D                                  f         hwlock@1905000           2qcom,tcsr-mutex          P                        f         syscon@1937000           2qcom,tcsr-ipq9574 syscon             p            f         mmc@7804000       %   2qcom,ipq9574-sdhci qcom,sdhci-msm-v5             @    P                 hc cqhci ice            _       {                     hc_irq pwr_irq           =      g      d         f         iface core xo ice                           	  Xdisabled          dma-controller@7884000           2qcom,bam-v1.7.0          @           _                   =      q         bam_clk         }                        f         serial@78af000        %   2qcom,msm-uartdm-v1.4 qcom,msm-uartdm                         _       k            =      )      q         core iface        	  Xdisabled          serial@78b0000        %   2qcom,msm-uartdm-v1.4 qcom,msm-uartdm                          _       l            =      *      q         core iface        	  Xdisabled          serial@78b1000        %   2qcom,msm-uartdm-v1.4 qcom,msm-uartdm                         _      2            =      +      q         core iface          Xokay                       default       serial@78b2000        %   2qcom,msm-uartdm-v1.4 qcom,msm-uartdm                          _      3            =      ,      q         core iface        	  Xdisabled          serial@78b3000        %   2qcom,msm-uartdm-v1.4 qcom,msm-uartdm             0            _      4            =      -      q         core iface        	  Xdisabled          serial@78b4000        %   2qcom,msm-uartdm-v1.4 qcom,msm-uartdm             @            _      5            =      .      q         core iface        	  Xdisabled          spi@78b5000          2qcom,spi-qup-v2.2.1          P                                      _       _            =            q         core iface                              tx rx           Xokay                       default    flash@0           2micron,n25q128a11 jedec,spi-nor                                                        i2c@78b6000          2qcom,i2c-qup-v2.2.1          `                                      _       `            =            q         core iface                                                    tx rx         	  Xdisabled          spi@78b6000          2qcom,spi-qup-v2.2.1          `                                      _       `            =             q         core iface                              tx rx         	  Xdisabled          i2c@78b7000          2qcom,i2c-qup-v2.2.1          p                                      _       a            =      !      q         core iface                !                                    tx rx         	  Xdisabled          spi@78b7000          2qcom,spi-qup-v2.2.1          p                                      _       a            =      "      q         core iface                              tx rx         	  Xdisabled          i2c@78b8000          2qcom,i2c-qup-v2.2.1                                                _       b            =      #      q         core iface                #                                    tx rx         	  Xdisabled          spi@78b8000          2qcom,spi-qup-v2.2.1                                                _       b                    =      $      q         core iface                              tx rx         	  Xdisabled          i2c@78b9000          2qcom,i2c-qup-v2.2.1                                                _      +            =      %      q         core iface                %                                    tx rx         	  Xdisabled          spi@78b9000          2qcom,spi-qup-v2.2.1                                                _      +            =      &      q         core iface                              tx rx         	  Xdisabled          dma-controller@7984000            2qcom,bam-v1.7.4 qcom,bam-v1.7.0          @           _                   =      o         bam_clk         }                       Xokay             f         spi@79b0000          2qcom,ipq9574-snand                                                   =      p      o               core aon iom                                     
  tx rx cmd           Xokay                       default          f      flash@0       	   2spi-nand                                                  #           3           E            phy@7b000            2qcom,ipq9574-qusb2-phy                       M             =      b            cfg_ahb ref         '      $        Xokay            X           c           s            f         phy@7d000            2qcom,ipq9574-qmp-usb3-phy                
         M             =      Y         b               aux ref cfg_ahb pipe            '      *      +        .phy phy_phy          D            :usb0_pipe_clk           Xokay            c                       f          usb@8af8800          2qcom,ipq9574-dwc3 qcom,dwc3                                                      (   =      \      [      ]            `      #   cfg_noc core iface sleep mock_utmi                [      `         n6                            
  pwr_event           '      ,        Xokay       usb@8a00000       
   2snps,dwc3                          =      `         ref         _                                 usb2-phy usb3-phy                                                           (host             interrupt-controller@b000000             2qcom,msm-qgic2                               @                                       .        C           _      	                  0          f      v2m@0            2arm,gic-v2m-frame                           0      v2m@1000             2arm,gic-v2m-frame                          0      v2m@2000             2arm,gic-v2m-frame                           0         watchdog@b017000          $   2qcom,apss-wdt-ipq9574 qcom,kpss-wdt          p            _                   =           ?         mailbox@b111000       <   2qcom,ipq9574-apcs-apps-global qcom,ipq6018-apcs-apps-global                       D            =   !                  pll xo gpll0            K            f         clock@b116000            2qcom,ipq9574-a73pll          `    @         D             =            xo           f   !      timer@b120000            2arm,armv7-timer-mem                                                    frame@b120000                             W            _                          frame@b123000            0            W           _       	         	  Xdisabled          frame@b124000            @            W           _       
         	  Xdisabled          frame@b125000            P            W           _                	  Xdisabled          frame@b126000            `            W           _                	  Xdisabled          frame@b127000            p            W           _                	  Xdisabled          frame@b128000                        W           _                	  Xdisabled             pcie@10000000            2qcom,pcie-ipq9574         0                      @                   dbi elbi atu parf config mhi             ~pci         d           u                                                 0                              0  0              `  _                                                                              !         (  msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7         C                                                               #                                1                                T                                U         0   =      2      <      ;      O      U      I      %   axi_m axi_s axi_bridge rchng ahb aux          @  '      X      W      V      U      T      S      R      Q      :  .pipe sticky axi_s_sticky axi_s axi_m_sticky axi_m aux ahb                      pciephy                                          pcie-mem cpu-pcie           Xokay               "        default                                         pcie@18000000            2qcom,pcie-ipq9574         0                       @       `            dbi elbi atu parf config mhi             ~pci         d           u                                                 0                              0  0              `  _                                    8         F                                    (  msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7         C                                                                                                                                                                        0   =      6      B      A      S      W      K      %   axi_m axi_s axi_bridge rchng ahb aux          @  '      h      g      f      e      d      c      b      a      :  .pipe sticky axi_s_sticky axi_s axi_m_sticky axi_m aux ahb                      pciephy                                          pcie-mem cpu-pcie           Xokay               #        default                                 !         pcie@20000000            2qcom,pcie-ipq9574         0                         @                    dbi elbi atu parf config mhi             ~pci         d           u                                                 0                                0   0              `  _       ~                                                                               (  msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7         C                                                                                                                                                                        0   =      4      ?      >      Q      V      J      %   axi_m axi_s axi_bridge rchng ahb aux          @  '      `      _      ^      ]      \      [      Z      Y      :  .pipe sticky axi_s_sticky axi_s axi_m_sticky axi_m aux ahb                      pciephy                      	      
              pcie-mem cpu-pcie           Xokay               $        default                                         pcie@28000000            2qcom,pcie-ipq9574         0   (     (     (          @ (      `            dbi elbi atu parf config mhi             ~pci         d            u                                                 0             (                 (0  (0              `  _       4          7          8          9          ;          ?          D          H         (  msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7         C                                                               K                                N                                O                                S         0   =      0      9      8      M      T      H      %   axi_m axi_s axi_bridge rchng ahb aux          @  '      P      O      N      M      L      K      J      I      :  .pipe sticky axi_s_sticky axi_s axi_m_sticky axi_m aux ahb                      pciephy                                           pcie-mem cpu-pcie         	  Xdisabled          clock-controller@39b00000            2qcom,ipq9574-nsscc           9           <   =                                                   k      d   xo nss_1200 ppe_353 gpll0_out uniphy0_rx uniphy0_tx uniphy1_rx uniphy1_tx uniphy2_rx uniphy2_tx bus          D                                  thermal-zones      nss-top-thermal            %      trips      nss-top-critical             H                	   critical                ubi-0-thermal              %      trips      ubi_0-critical           H                	   critical                ubi-1-thermal              %      trips      ubi_1-critical           H                	   critical                ubi-2-thermal              %      trips      ubi_2-critical           H                	   critical                ubi-3-thermal              %      trips      ubi_3-critical           H                	   critical                cpuss0-thermal             %      trips      cpu-critical             H                	   critical                cpuss1-thermal             %   	   trips      cpu-critical             H                	   critical                cpu0-thermal               %   
   trips      cpu-critical                       '      	   critical          cpu-passive                             passive          f   &         cooling-maps       map0            	   &      0     '   (   )   *            cpu1-thermal               %      trips      cpu-critical                       '      	   critical          cpu-passive                             passive          f   +         cooling-maps       map0            	   +      0     '   (   )   *            cpu2-thermal               %      trips      cpu-critical                       '      	   critical          cpu-passive                             passive          f   ,         cooling-maps       map0            	   ,      0     '   (   )   *            cpu3-thermal               %      trips      cpu-critical                       '      	   critical          cpu-passive                             passive          f   -         cooling-maps       map0            	   -      0     '   (   )   *            wcss-phyb-thermal              %      trips      wcss_phyb-critical           H                	   critical                top-glue-thermal               %      trips      top_glue-critical            H                	   critical                   timer            2arm,armv8-timer       0  _                                      aliases         /soc@0/serial@78b1000         chosen          %serial0:115200n8          s3300            2regulator-fixed          2Z         2Z                        
  1fixed_3p3            f         s0925            2regulator-fixed          H         H                          1fixed_0p925          f         gpio-keys         
   2gpio-keys              .        default    button-wps          @wps         F                %           Q   <         leds          
   2gpio-leds              /        default    led-0           c           Ywlan                  @           iphy0tx          off             	interrupt-parent #address-cells #size-cells model compatible clocks #clock-cells clock-div clock-mult phandle clock-frequency device_type reg enable-method next-level-cache clock-names operating-points-v2 cpu-supply #cooling-cells cache-level cache-unified qcom,dload-mode opp-shared nvmem-cells opp-hz opp-microvolt opp-supported-hw clock-latency-ns interrupts qcom,rpm-msg-ram mboxes qcom,glink-channels regulator-min-microvolt regulator-max-microvolt regulator-always-on regulator-boot-on ranges no-map hwlocks assigned-clocks assigned-clock-rates resets reset-names clock-output-names #phy-cells status assigned-clock-rates-u64 bits #dma-cells qcom,ee qcom,num-ees num-channels qcom,controlled-remotely dmas dma-names interrupt-names #qcom,sensors #thermal-sensor-cells gpio-controller #gpio-cells gpio-ranges interrupt-controller #interrupt-cells pins function drive-strength bias-disable bias-pull-up bias-pull-down output-low #reset-cells #interconnect-cells #hwlock-cells reg-names non-removable supports-cqe pinctrl-0 pinctrl-names spi-max-frequency nand-ecc-engine nand-ecc-strength nand-ecc-step-size vdd-supply vdda-pll-supply vdda-phy-dpdm-supply vdda-phy-supply interrupts-extended phys phy-names tx-fifo-resize snps,is-utmi-l1-suspend snps,hird-threshold snps,dis_u2_susphy_quirk snps,dis_u3_susphy_quirk dr_mode msi-controller timeout-sec #mbox-cells frame-number linux,pci-domain bus-range num-lanes interrupt-map-mask interrupt-map interconnects interconnect-names perst-gpios wake-gpios thermal-sensors temperature hysteresis trip cooling-device serial0 stdout-path regulator-name label linux,code debounce-interval color linux,default-trigger default-state 