  5P   8  .`   (              .(                             3    beagle,beaglev-starlight-jh7100-r0 starfive,jh7100                                   &BeagleV Starlight Beta     cpus                                      , _^         ?      cpu@0             sifive,u74-mc riscv          G             K   @         ^   @         k            x                         cpu             @            @                                              riscv,sv39                       rv64imafdc          rv64i         (  i m a f d c zicntr zicsr zifencei zihpm          %         ?      interrupt-controller              riscv,cpu-intc           /        D            ?            cpu@1             sifive,u74-mc riscv          G            K   @         ^   @         k            x                         cpu             @            @                                              riscv,sv39                       rv64imafdc          rv64i         (  i m a f d c zicntr zicsr zifencei zihpm          %         ?      interrupt-controller              riscv,cpu-intc           /        D            ?            cpu-map    cluster0       core0           U         core1           U                  thermal-zones      cpu-thermal         Y           o  :        }      trips      cpu-alert0           $                   passive       cpu-crit             _                	   critical                   osc-sys           fixed-clock                     osc_sys         }x@         ?         osc-aud           fixed-clock                     osc_aud                  ?         gmac-rmii-ref             fixed-clock                     gmac_rmii_ref                        ?         gmac-gr-mii-rxclk             fixed-clock                     gmac_gr_mii_rxclk                        ?         soc           simple-bus                                                             H                    z             z                                 clint@2000000         $    starfive,jh7100-clint sifive,clint0          G                                                        ?         cache-controller@2010000          ,    starfive,jh7100-ccache sifive,ccache0 cache          G                                          M   @        &            `            m             2         ?         interrupt-controller@c000000          '    starfive,jh7100-plic sifive,plic-1.0.0           G                                   	            	         /                     D           @            ?         mmc@10000000              snps,dw-mshc             G                      K      r      t        Rbiu ciu                    ^            h             s        okay                                         default            	         ?         mmc@10010000              snps,dw-mshc             G                     K      u      w        Rbiu ciu                    ^            h             s        okay                                                                              
                 default                     ?      wifi@1            brcm,bcm4329-fmac            G            ethernet@10020000         !    starfive,jh7100-dwmac snps,dwmac             G                   (  K      y      x      z            {        Rstmmaceth pclk ptp_ref tx gtx                 <        ahb                       macirq eth_wake_irq         *  #(        9            T           p      p                         @                                      okay            default                  	  rgmii-id                        ?      stmmac-axi-config                                          @                         ?         mdio                                       snps,dwmac-mdio          ?       ethernet-phy@7           G                 ?            ?               clock-controller@11800000             starfive,jh7100-clkgen           G                     K                  0  Rosc_sys osc_aud gmac_rmii_ref gmac_gr_mii_rxclk                     ?         reset-controller@11840000             starfive,jh7100-reset            G                     "            ?         syscon@11850000           starfive,jh7100-sysmain syscon           G                      ?         i2c@118b0000              snps,designware-i2c          G                     K                  	  Rref pclk                  R           `                                 okay                     /  ,        D          \          default                     ?   !   pmic@5e           ti,tps65086          G   ^         t              regulators              i2c@118c0000              snps,designware-i2c          G                     K                  	  Rref pclk                  T           a                                 okay                     /  ,        D   d        \   d        default                     ?   "      pinctrl@11910000              starfive,jh7100-pinctrl           G                                 gpio padctl         K                    V                     t                    /        D            ?      gmac-0           ?      gtxclk-pins                                #                                    miitxclk-pins                                                                      tx-pins       $                                                 #                                    rxclk-pins                                                                    rxer-pins                                                                      rx-pins       4                                                                                                    i2c0-0           ?      i2c-pins             
~ 	}                                    i2c1-0           ?      i2c-pins             
o p                                    i2c2-0           ?      i2c-pins             | {                                    pwm-0            ?      pwm-pins            %&                    #                                       sdio0-0          ?   	   clk-pins            6 6                                 sdio-pins            787uA9qB:rC;sD<t                                    sdio1-0          ?      clk-pins            K !                                 sdio-pins           ML&]VN'dWO(^XP)bYQ*_                                    uart3-0          ?      rx-pins          I                                                        tx-pins                              #                                          serial@12430000       &    starfive,jh7100-uart snps,dw-apb-uart            G    C                 K                    Rbaudclk apb_pclk                  W           H                   ,         	  disabled             ?   #      serial@12440000       &    starfive,jh7100-uart snps,dw-apb-uart            G    D                 K                    Rbaudclk apb_pclk                  Y           I                   ,           okay            default                     ?   $      i2c@12450000              snps,designware-i2c          G    E                 K                  	  Rref pclk                  _           J                                 okay                     /  ,        D          \          default                     ?   %      i2c@12460000              snps,designware-i2c          G    F                 K                  	  Rref pclk                  a           K                               	  disabled             ?   &      watchdog@12480000             starfive,jh7100-wdt          G    H                 K                  	  Rapb core                  c      d      pwm@12490000          %    starfive,jh7100-pwm opencores,pwm-v1             G    I                 K                    m        6           okay            default                     ?   '      temperature-sensor@124a0000           starfive,jh7100-temp             G    J                 K                  
  Rsense bus                 p      o      
  sense bus           A             ?            aliases         W/soc/mmc@10000000           \/soc/mmc@10010000           a/soc/serial@12440000          chosen          iserial0:115200n8          memory@80000000          memory           G                    leds          
    gpio-leds      led-ack               +            u         
  {heartbeat         
  heartbeat           ack          reserved-memory                                     dma-reserved@fa000000            G                             linux,dma@107a000000              shared-dma-pool          G   z                                     wifi-pwrseq           mmc-pwrseq-simple                 %            ?   
      __symbols__         /cpus           /cpus/cpu@0       !  /cpus/cpu@0/interrupt-controller            /cpus/cpu@1       !  /cpus/cpu@1/interrupt-controller          	  /osc-sys          	  /osc-aud            /gmac-rmii-ref          /gmac-gr-mii-rxclk          /soc/clint@2000000          /soc/cache-controller@2010000         "  /soc/interrupt-controller@c000000            /soc/mmc@10000000           &/soc/mmc@10010000           ,/soc/ethernet@10020000        )  1/soc/ethernet@10020000/stmmac-axi-config            B/soc/ethernet@10020000/mdio       +  G/soc/ethernet@10020000/mdio/ethernet-phy@7          K/soc/clock-controller@11800000          R/soc/reset-controller@11840000          Y/soc/syscon@11850000            a/soc/i2c@118b0000           f/soc/i2c@118c0000           k/soc/pinctrl@11910000           p/soc/pinctrl@11910000/gmac-0            z/soc/pinctrl@11910000/i2c0-0            /soc/pinctrl@11910000/i2c1-0            /soc/pinctrl@11910000/i2c2-0            /soc/pinctrl@11910000/pwm-0         /soc/pinctrl@11910000/sdio0-0           /soc/pinctrl@11910000/sdio1-0           /soc/pinctrl@11910000/uart3-0           /soc/serial@12430000            /soc/serial@12440000            /soc/i2c@12450000           /soc/i2c@12460000           /soc/pwm@12490000         !  /soc/temperature-sensor@124a0000            /wifi-pwrseq             	compatible #address-cells #size-cells model timebase-frequency phandle reg d-cache-block-size d-cache-sets d-cache-size d-tlb-sets d-tlb-size device_type i-cache-block-size i-cache-sets i-cache-size i-tlb-sets i-tlb-size mmu-type next-level-cache riscv,isa riscv,isa-base riscv,isa-extensions tlb-split interrupt-controller #interrupt-cells cpu polling-delay-passive polling-delay thermal-sensors temperature hysteresis #clock-cells clock-output-names clock-frequency interrupt-parent dma-noncoherent ranges dma-ranges interrupts-extended interrupts cache-level cache-unified riscv,ndev clocks clock-names data-addr fifo-depth fifo-watermark-aligned status broken-cd bus-width cap-sd-highspeed pinctrl-names pinctrl-0 cap-sdio-irq cap-power-off-card mmc-pwrseq non-removable resets reset-names interrupt-names max-frame-size snps,multicast-filter-bins snps,perfect-filter-entries starfive,syscon rx-fifo-depth tx-fifo-depth snps,axi-config snps,fixed-burst snps,force_thresh_dma_mode phy-mode phy-handle snps,wr_osr_lmt snps,rd_osr_lmt snps,blen reset-gpios #reset-cells i2c-sda-hold-time-ns i2c-sda-falling-time-ns i2c-scl-falling-time-ns gpio-controller #gpio-cells reg-names pins bias-pull-up drive-strength input-enable input-schmitt-enable slew-rate input-schmitt-disable input-disable pinmux bias-disable reg-io-width reg-shift #pwm-cells #thermal-sensor-cells mmc0 mmc1 serial0 stdout-path color function linux,default-trigger label no-map linux,dma-default cpus U74_0 cpu0_intc U74_1 cpu1_intc osc_sys osc_aud gmac_rmii_ref gmac_gr_mii_rxclk clint ccache plic sdio0 sdio1 gmac stmmac_axi_setup mdio phy clkgen rstgen sysmain i2c0 i2c1 gpio gmac_pins i2c0_pins i2c1_pins i2c2_pins pwm_pins sdio0_pins sdio1_pins uart3_pins uart2 uart3 i2c2 i2c3 pwm sfctemp wifi_pwrseq 