Ðþí   o   8  @   (            /                                                        ;   sifive,hifive-unleashed-a00 sifive,fu540-c000 sifive,fu540           &SiFive HiFive Unleashed A00    aliases          ,/soc/serial@10010000             4/soc/serial@10011000             </soc/ethernet@10090000        chosen           Fserial0       cpus                                       R B@   cpu@0             sifive,e51 sifive,rocket0 riscv          ecpu          q   @         „   €         ‘  @          ž          	   ¢rv64imac             ¬rv64i         $   »i m a c zicntr zicsr zifencei zihpm       	   Ðdisabled             ×      interrupt-controller             ß            riscv,cpu-intc            ð         ×            cpu@1         #   sifive,u54-mc sifive,rocket0 riscv             @           @        %  €         2           =             ecpu          q   @         „   @         ‘  €         H           S            ^riscv,sv39           ž            ¢rv64imafdc           ¬rv64i         (   »i m a f d c zicntr zicsr zifencei zihpm          g        q            ×      interrupt-controller             ß            riscv,cpu-intc            ð         ×            cpu@2         #   sifive,u54-mc sifive,rocket0 riscv             @           @        %  €         2           =             ecpu          q   @         „   @         ‘  €         H           S            ^riscv,sv39           ž            ¢rv64imafdc           ¬rv64i         (   »i m a f d c zicntr zicsr zifencei zihpm          g        q            ×      interrupt-controller             ß            riscv,cpu-intc            ð         ×   	         cpu@3         #   sifive,u54-mc sifive,rocket0 riscv             @           @        %  €         2           =             ecpu          q   @         „   @         ‘  €         H           S            ^riscv,sv39           ž            ¢rv64imafdc           ¬rv64i         (   »i m a f d c zicntr zicsr zifencei zihpm          g        q            ×      interrupt-controller             ß            riscv,cpu-intc            ð         ×   
         cpu@4         #   sifive,u54-mc sifive,rocket0 riscv             @           @        %  €         2           =             ecpu          q   @         „   @         ‘  €         H           S            ^riscv,sv39           ž            ¢rv64imafdc           ¬rv64i         (   »i m a f d c zicntr zicsr zifencei zihpm          g        q            ×      interrupt-controller             ß            riscv,cpu-intc            ð         ×            cpu-map    cluster0       core0           ‚         core1           ‚         core2           ‚         core3           ‚         core4           ‚                  soc                                   simple-bus           †   interrupt-controller@c000000          )   sifive,fu540-c000-plic sifive,plic-1.0.0             ž                                     ß             ð      H     ÿÿÿÿ   ÿÿÿÿ      	   	ÿÿÿÿ   	   	   
ÿÿÿÿ   
   	   ÿÿÿÿ      	        ¡   5         ×         clock-controller@10000000            sifive,fu540-c000-prci           ž                      ¬              ³            ×         serial@10010000       $   sifive,fu540-c000-uart sifive,uart0          ž                     À           Ñ           ¬               Ðokay          dma-controller@3000000        $   sifive,fu540-c000-pdma sifive,pdma0          ž             €         À            Ñ                                Ü           é         serial@10011000       $   sifive,fu540-c000-uart sifive,uart0          ž                    À           Ñ           ¬               Ðokay          i2c@10030000          "   sifive,fu540-c000-i2c sifive,i2c0            ž                     À           Ñ   2        ¬              ô           þ                                      Ðokay          spi@10040000          "   sifive,fu540-c000-spi sifive,spi0             ž                                    À           Ñ   3        ¬                                         Ðokay       flash@0          jedec,spi-nor            ž            úð€                 ,           =            spi@10041000          "   sifive,fu540-c000-spi sifive,spi0             ž                0                  À           Ñ   4        ¬                                      	   Ðdisabled          spi@10050000          "   sifive,fu540-c000-spi sifive,spi0            ž                     À           Ñ           ¬                                         Ðokay       mmc@0            mmc-spi-slot             ž            1-         N  ä  ä         ]        h                  ethernet@10090000            sifive,fu540-c000-gem           À           Ñ   5          ž    	              
                 n              
  €pclk hclk           ¬                                               Ðokay            Œgmii            •      ethernet-phy@0           ethernet-phy-id0007.0771             ž             ×            pwm@10020000          "   sifive,fu540-c000-pwm sifive,pwm0            ž                     À           Ñ   *   +   ,   -        ¬                           Ðokay             ×         pwm@10021000          "   sifive,fu540-c000-pwm sifive,pwm0            ž                    À           Ñ   .   /   0   1        ¬                           Ðokay          cache-controller@2010000             sifive,fu540-c000-ccache cache           s   @        «            †            “             ·        À           Ñ                  ž                      ×         gpio@10060000         $   sifive,fu540-c000-gpio sifive,gpio0         À         @  Ñ         	   
                                             ž                      Å        Õ             ð         ß           ¬               Ðokay             ×            memory@80000000          ememory           ž    €                hfclk           ³             fixed-clock         áü U        ñhfclk            ×         rtcclk          ³             fixed-clock         á B@        ñrtcclk           ×         gpio-restart             gpio-restart            h      
         led-controller        	   pwm-leds       led-d1                  w5”            	                      ÿ        )d1        led-d2                 w5”            	                      ÿ        )d2        led-d3                 w5”            	                      ÿ        )d3        led-d4                 w5”            	                      ÿ        )d4              	#address-cells #size-cells compatible model serial0 serial1 ethernet0 stdout-path timebase-frequency device_type i-cache-block-size i-cache-sets i-cache-size reg riscv,isa riscv,isa-base riscv,isa-extensions status phandle #interrupt-cells interrupt-controller d-cache-block-size d-cache-sets d-cache-size d-tlb-sets d-tlb-size i-tlb-sets i-tlb-size mmu-type tlb-split next-level-cache cpu ranges interrupts-extended riscv,ndev clocks #clock-cells interrupt-parent interrupts dma-channels #dma-cells reg-shift reg-io-width spi-max-frequency m25p,fast-read spi-tx-bus-width spi-rx-bus-width voltage-ranges disable-wp gpios local-mac-address clock-names phy-mode phy-handle #pwm-cells cache-level cache-unified gpio-controller #gpio-cells clock-frequency clock-output-names pwms active-low color max-brightness label 