  }   8  r   (            
  rL                                 pine64,star64 starfive,jh7110                                    &Pine64 Star64      cpus                                      , =	    cpu@0             sifive,s7 riscv          ?             Ccpu          O   @         b   @         o  @          |            rv64imac_zba_zbb             rv64i         ,   i m a c zba zbb zicntr zicsr zifencei zihpm       	   disabled                   interrupt-controller              riscv,cpu-intc                                             cpu@1             sifive,u74-mc riscv          ?               @           @                              (   (         Ccpu          O   @         b   @         o           3           >   (        Iriscv,sv39           |            rv64imafdc_zba_zbb           rv64i         0   i m a f d c zba zbb zicntr zicsr zifencei zihpm          R        \           p              wcpu                                      interrupt-controller              riscv,cpu-intc                                             cpu@2             sifive,u74-mc riscv          ?               @           @                              (   (         Ccpu          O   @         b   @         o           3           >   (        Iriscv,sv39           |            rv64imafdc_zba_zbb           rv64i         0   i m a f d c zba zbb zicntr zicsr zifencei zihpm          R        \           p              wcpu                                      interrupt-controller              riscv,cpu-intc                                             cpu@3             sifive,u74-mc riscv          ?               @           @                              (   (         Ccpu          O   @         b   @         o           3           >   (        Iriscv,sv39           |            rv64imafdc_zba_zbb           rv64i         0   i m a f d c zba zbb zicntr zicsr zifencei zihpm          R        \           p              wcpu                                      interrupt-controller              riscv,cpu-intc                                             cpu@4             sifive,u74-mc riscv          ?               @           @                              (   (         Ccpu          O   @         b   @         o           3           >   (        Iriscv,sv39           |            rv64imafdc_zba_zbb           rv64i         0   i m a f d c zba zbb zicntr zicsr zifencei zihpm          R        \           p              wcpu                                   	   interrupt-controller              riscv,cpu-intc                                             cpu-map    cluster0       core0                    core1                    core2                    core3                    core4              	               opp-table-0           operating-points-v2                         opp-375000000               Z         5       opp-500000000               e          5       opp-750000000               ,         5       opp-1500000000              Yh/          ހ         thermal-zones      cpu-thermal                      :           
   cooling-maps       map0                     0              	         trips      cpu-alert0          	 L                   Jpassive                   cpu-crit            	                 	   Jcritical                   dvp-clock             fixed-clock          dvp_clk         3            @l            :      gmac0-rgmii-rxin-clock            fixed-clock          gmac0_rgmii_rxin            3            @sY@            5      gmac0-rmii-refin-clock            fixed-clock          gmac0_rmii_refin            3            @            4      gmac1-rgmii-rxin-clock            fixed-clock          gmac1_rgmii_rxin            3            @sY@            '      gmac1-rmii-refin-clock            fixed-clock          gmac1_rmii_refin            3            @            &      hdmitx0-pixel-clock           fixed-clock          hdmitx0_pixelclk            3            @@            =      i2srx-bclk-ext-clock              fixed-clock          i2srx_bclk_ext          3            @                    i2srx-lrck-ext-clock              fixed-clock          i2srx_lrck_ext          3            @                    i2stx-bclk-ext-clock              fixed-clock          i2stx_bclk_ext          3            @              #      i2stx-lrck-ext-clock              fixed-clock          i2stx_lrck_ext          3            @              $      mclk-ext-clock            fixed-clock       	   mclk_ext            3            @                    oscillator            fixed-clock          osc         3            @n6                    rtc-oscillator            fixed-clock          rtc_osc         3            @               6      stmmac-axi-config            P        \           l           |         @                            0      tdm-ext-clock             fixed-clock          tdm_ext         3            @                    soc           simple-bus                                                 timer@2000000         $    starfive,jh7110-clint sifive,clint0          ?                    P                                                                    cache-controller@2010000          ,    starfive,jh7110-ccache sifive,ccache0 cache          ?            @                              Q   @                    d            q                               interrupt-controller@c000000          '    starfive,jh7110-plic sifive,plic-1.0.0           ?                    H                    	            	            	            	                                                                serial@10000000       &    starfive,jh7110-uart snps,dw-apb-uart            ?                      p                    wbaudclk apb_pclk                  S      T                                           okay             default                  serial@10010000       &    starfive,jh7110-uart snps,dw-apb-uart            ?                     p                    wbaudclk apb_pclk                  U      V           !                            	   disabled          serial@10020000       &    starfive,jh7110-uart snps,dw-apb-uart            ?                     p                    wbaudclk apb_pclk                  W      X           "                            	   disabled          i2c@10030000              snps,designware-i2c          ?                     p              wref               L           #                                  okay            @           ,        -          E           default                  i2c@10040000              snps,designware-i2c          ?                     p              wref               M           $                               	   disabled          i2c@10050000              snps,designware-i2c          ?                     p              wref               N           %                                  okay            @           ,        -          E           default                  spi@10060000              arm,pl022 arm,primecell          ?                     p                    wsspclk apb_pclk               E           &        ] "        t                                     okay             default               spi@0             rohm,dh2228fv            ?            {          spi@10070000              arm,pl022 arm,primecell          ?                     p                    wsspclk apb_pclk               F           '        ] "        t                                  	   disabled          spi@10080000              arm,pl022 arm,primecell          ?                     p                    wsspclk apb_pclk               G           (        ] "        t                                  	   disabled          tdm@10090000              starfive,jh7110-tdm          ?    	               ,  p                                       4  wtdm_ahb tdm_apb tdm_internal tdm mclk_inner tdm_ext               i      k      j                            rx tx                     	   disabled          i2s@100e0000              starfive,jh7110-i2srx            ?                   <  p                                                   @  wi2sclk apb mclk mclk_inner mclk_ext bclk lrck bclk_ext lrck_ext               c      d                          tx rx                                      	   disabled          pwmdac@100b0000           starfive,jh7110-pwmdac           ?                     p                  	  wapb core                  `                      tx                       okay             default                        E      usb@10100000              starfive,jh7110-usb                                                                  (  p                                      wlpm stb apb axi utmi_apb                   
                  	        pwrup apb axi utmi_apb           okay            peripheral     usb@0         
    cdns,usb3            ?                           otg xhci dev               d   l   n        host peripheral otg                    cdns3,usb2-phy           phy@10200000              starfive,jh7110-usb-phy          ?                      p      _              w125m app_125m                                 phy@10210000              starfive,jh7110-pcie-phy             ?    !                                 ?      phy@10220000              starfive,jh7110-pcie-phy             ?    "                                 B      clock-controller@10230000             starfive,jh7110-stgcrg           ?    #               <  p          6            _            7                  H  wosc hifi4_core stg_axiahb usb_125m cpu_bus hifi4_axi nocstg_bus apb_bus         3                                syscon@10240000       "    starfive,jh7110-stg-syscon syscon            ?    $                           serial@12000000       &    starfive,jh7110-uart snps,dw-apb-uart            ?                      p                    wbaudclk apb_pclk                  Y      Z           -                            	   disabled          serial@12010000       &    starfive,jh7110-uart snps,dw-apb-uart            ?                     p                    wbaudclk apb_pclk                  [      \           .                            	   disabled          serial@12020000       &    starfive,jh7110-uart snps,dw-apb-uart            ?                     p                    wbaudclk apb_pclk                  ]      ^           /                            	   disabled          i2c@12030000              snps,designware-i2c          ?                     p              wref               O           0                               	   disabled          i2c@12040000              snps,designware-i2c          ?                     p              wref               P           1                               	   disabled          i2c@12050000              snps,designware-i2c          ?                     p              wref               Q           2                                  okay            @           ,        -          E           default            !   pmic@36           x-powers,axp15060            ?   6                         regulators     dcdc1            &         8        L 2Z        d 2Z        |vcc_3v3             +      dcdc2            8        L          d         |vdd-cpu                   aldo4            &         8        L w@        d 2Z      	  |emmc_vdd                ,               i2c@12060000              snps,designware-i2c          ?                     p              wref               R           3                                  okay            @           ,        -          E           default            "      spi@12070000              arm,pl022 arm,primecell          ?                     p                    wsspclk apb_pclk               H           4        ] "        t                                  	   disabled          spi@12080000              arm,pl022 arm,primecell          ?                     p                    wsspclk apb_pclk               I           5        ] "        t                                  	   disabled          spi@12090000              arm,pl022 arm,primecell          ?    	                 p                    wsspclk apb_pclk               J           6        ] "        t                                  	   disabled          spi@120a0000              arm,pl022 arm,primecell          ?    
                 p                    wsspclk apb_pclk               K           7        ] "        t                                  	   disabled          i2s@120b0000              starfive,jh7110-i2stx0           ?                   $  p                                 $  wi2sclk apb mclk mclk_inner mclk_ext               e      f              /        tx                    	   disabled          i2s@120c0000              starfive,jh7110-i2stx1           ?                   <  p                                          #   $      @  wi2sclk apb mclk mclk_inner mclk_ext bclk lrck bclk_ext lrck_ext               g      h              0        tx                    	   disabled          pwm@120d0000          %    starfive,jh7110-pwm opencores,pwm-v1             ?                     p      y              l                    okay             default            %      temperature-sensor@120e0000           starfive,jh7110-temp             ?                     p                  
  wsense bus                 |      {      
  sense bus                           
      spi@13010000          #    starfive,jh7110-qspi cdns,qspi-nor            ?                 !        @                     p      Z      W      X        wref ahb apb               >      =      ?        qspi qspi-ocp rstc_ref                                             okay                                flash@0           jedec,spi-nor            ?                       {                                                 partitions            fixed-partitions                               spl@0            ?             uboot-env@f0000          ?            uboot@100000             ?                     clock-controller@13020000             starfive,jh7110-syscrg           ?                   <  p       &   '   #   $               (       (      (           wosc gmac1_rmii_refin gmac1_rgmii_rxin i2stx_bclk_ext i2stx_lrck_ext i2srx_bclk_ext i2srx_lrck_ext tdm_ext mclk_ext pll0_out pll1_out pll2_out           3                      )         (            9e Yh/                   syscon@13030000       -    starfive,jh7110-sys-syscon syscon simple-mfd             ?                            clock-controller              starfive,jh7110-pll         p            3               (         pinctrl@13040000              starfive,jh7110-sys-pinctrl          ?                     p      p                         V                               N        ^               -   i2c0-0                 i2c-pins            j	 9
 :         q         ~                  i2c2-0                 i2c-pins            j; x< |         q         ~                  i2c5-0              !   i2c-pins            jO P          q         ~                  i2c6-0              "   i2c-pins            jV W          q         ~                  mmc0-0              *   rst-pins            j >                                                        mmc-pins          (  j  @  A  B  C  D  E  F  G  H  I                             ~         mmc1-0              .   clk-pins            j7 
                                                        mmc-pins            j,9L	-:P.;T/<X0=\                             ~                              pcie0-0             @   clkreq-pins         j                              ~                           wake-pins           j                               ~                              pcie1-0             C   clkreq-pins         j                              ~                           wake-pins           j                              ~                              pwmdac-0                   pwmdac-pins         j ! "         q                                                  pwm-0               %   pwm-pins            j$.(;         q                                                  spi0-0                 mosi-pins           j  4         q                        miso-pins           j 5                  ~               sck-pins            j 0         q                        ss-pins         j 1         q                           uart0-0                tx-pins         j          q                                               rx-pins         j          q                    ~                                 watchdog@13070000             starfive,jh7110-wdt          ?                     p      z      {      	  wapb core                  m      n      crypto@16000000           starfive,jh7110-crypto           ?             @         p                  	  whclk ahb                                        )         )               tx rx         dma-controller@16008000           arm,pl080 arm,primecell         ]          ?            @                    p            	  wapb_pclk                                            '           9            J               )      rng@1600c000              starfive,jh7110-trng             ?            @         p                  	  whclk ahb                                   mmc@16010000              starfive,jh7110-mmc          ?                     p      [      ]        wbiu ciu               @        reset              J                     U        l            v         |            okay                     )      ]        9        @                                                           default            *           +           ,      mmc@16020000              starfive,jh7110-mmc          ?                     p      \      ^        wbiu ciu               A        reset              K                     U        l            v            >         okay                     )      ^        9        @                                -   )                                         default            .      ethernet@16030000         &    starfive,jh7110-dwmac snps,dwmac-5.20            ?                   (  p   /      /         m   /         o        wstmmaceth pclk ptp_ref tx gtx              /       /           stmmaceth ahb                            macirq eth_wake_irq eth_lpi         )           7           E   @        `            |                             0                                                   1               okay               2      	  rgmii-id                     )   /           /   /      mdio                                       snps,dwmac-mdio    ethernet-phy@0           ?            F          [  ^        y  ^                                                2            ethernet@16040000         &    starfive,jh7110-dwmac snps,dwmac-5.20            ?                   (  p      b      a      f      j      k        wstmmaceth pclk ptp_ref tx gtx                 B      C        stmmaceth ahb              N   M   L        macirq eth_wake_irq eth_lpi         )           7           E   @        `            |                             0                                                                  okay               3      	  rgmii-id                     )      i        /      e   mdio                                       snps,dwmac-mdio    ethernet-phy@1           ?           F            	  ,        [  ^        y  ^                                       3            dma-controller@16050000           starfive,jh7110-axi-dma          ?                     p                    wcore-clk cfgr-clk                                  I        J           	$           	1           	B           	R                    	b                     	p                     clock-controller@17000000             starfive,jh7110-aoncrg           ?                    (  p       4   5                  l   6      N  wosc gmac0_rmii_refin gmac0_rgmii_rxin stg_axiahb apb_bus gmac0_gtxclk rtc_osc           3                          /      syscon@17010000       "    starfive,jh7110-aon-syscon syscon            ?                     	               1      pinctrl@17020000              starfive,jh7110-aon-pinctrl          ?                        /              U                               N        ^         power-controller@17030000             starfive,jh7110-pmu          ?                        o        	               ;      csi@19800000          #    starfive,jh7110-csi2rx cdns,csi2rx           ?                   0  p   7      7      7      7   	   7   
   7         F  wsys_clk p_clk pixel_if0_clk pixel_if1_clk pixel_if2_clk pixel_if3_clk         0     7   	   7      7      7      7      7         5  sys reg_bank pixel_if0 pixel_if1 pixel_if2 pixel_if3               8        dphy          	   disabled            )   7           9@   ports                               port@0           ?          port@1           ?      endpoint            	   9            <               clock-controller@19810000             starfive,jh7110-ispcrg           ?                     p      3      4      5   :      1  wisp_top_core isp_top_axi noc_bus_isp_axi dvp_clk                  )      *              3                      	   ;               7      phy@19820000              starfive,jh7110-dphy-rx          ?                     p   7      7      7           wcfg ref tx             7      7           	   1                           8      isp@19840000              starfive,jh7110-camss             ?                                  syscon isp        8  p   7       7      7      7      7         3      4      E  wapb_func wrapper_clk_c dvp_inv axiwr mipi_rx0_pxl ispcore_2x isp_axi          0     7       7      7   
   7         )      *      6  wrapper_p wrapper_c axird axiwr isp_top_n isp_top_axi           	   ;              \   W   Z   X      	   disabled            )   7       7           9O`=   ports                               port@0           ?          port@1           ?      endpoint            	   <            9               clock-controller@295c0000             starfive,jh7110-voutcrg          ?    )\               ,  p      :      =      >      ?         =      V  wvout_src vout_top_ahb vout_top_axi vout_top_hdmitx0_mclk i2stx0_bclk hdmitx0_pixelclk                 +        3                      	   ;         pcie@940000000            starfive,jh7110-pcie              ?   	@              +                  cfg apb         	                                              8         0       0                	       	        @              8        	                     `  	                  >                     >                     >                     >            	         Cpci                    	                p      `      
            	        wnoc tl axi_mst0 apb       0                                              mst0 slv0 slv brg core apb        	   disabled            
   -                 ?         default            @   interrupt-controller                                                   >         pcie@9c0000000            starfive,jh7110-pcie              ?   	              ,                  cfg apb         	                                             8         8       8                	      	       @              9        	                     `  	                  A                     A                     A                     A            	         Cpci                    	                p      `                          wnoc tl axi_mst0 apb       0                                              mst0 slv0 slv brg core apb           okay            
   -                 B         default            C   interrupt-controller                                                   A            aliases         
/soc/ethernet@16030000          
/soc/i2c@10030000           
/soc/i2c@10050000           
$/soc/i2c@12050000           
)/soc/i2c@12060000           
./soc/mmc@16010000           
3/soc/mmc@16020000           
8/soc/serial@10000000            
@/soc/ethernet@16040000        chosen          
Jserial0:115200n8          memory@40000000          Cmemory           ?    @                gpio-restart              gpio-restart               -   #            	g         audio-codec           linux,spdif-dit                         F      sound             simple-audio-card           
VStarFive-PWMDAC-Sound-Card                              simple-audio-card,dai-link@0             ?            
mleft_j          
t   D        
   D   cpu         
   E            D      codec           
   F               	compatible #address-cells #size-cells model timebase-frequency reg device_type i-cache-block-size i-cache-sets i-cache-size next-level-cache riscv,isa riscv,isa-base riscv,isa-extensions status phandle interrupt-controller #interrupt-cells d-cache-block-size d-cache-sets d-cache-size d-tlb-sets d-tlb-size i-tlb-sets i-tlb-size mmu-type tlb-split operating-points-v2 clocks clock-names #cooling-cells cpu-supply cpu opp-shared opp-hz opp-microvolt polling-delay-passive polling-delay thermal-sensors trip cooling-device temperature hysteresis clock-output-names #clock-cells clock-frequency snps,lpi_en snps,wr_osr_lmt snps,rd_osr_lmt snps,blen interrupt-parent ranges interrupts-extended interrupts cache-level cache-unified riscv,ndev resets reg-io-width reg-shift pinctrl-names pinctrl-0 i2c-sda-hold-time-ns i2c-sda-falling-time-ns i2c-scl-falling-time-ns arm,primecell-periphid num-cs spi-max-frequency dmas dma-names #sound-dai-cells starfive,syscon starfive,stg-syscon reset-names dr_mode reg-names interrupt-names phys phy-names #phy-cells #reset-cells regulator-boot-on regulator-always-on regulator-min-microvolt regulator-max-microvolt regulator-name #pwm-cells #thermal-sensor-cells cdns,fifo-depth cdns,fifo-width cdns,trigger-address cdns,read-delay cdns,tshsl-ns cdns,tsd2d-ns cdns,tchsh-ns cdns,tslch-ns assigned-clocks assigned-clock-rates gpio-controller #gpio-cells pinmux bias-disable input-enable input-schmitt-enable bias-pull-up drive-strength input-disable input-schmitt-disable slew-rate bias-pull-down lli-bus-interface-ahb1 mem-bus-interface-ahb1 memcpy-burst-size memcpy-bus-width #dma-cells fifo-watermark-aligned data-addr starfive,sysreg cap-mmc-highspeed mmc-ddr-1_8v mmc-hs200-1_8v cap-mmc-hw-reset post-power-on-delay-ms vmmc-supply vqmmc-supply no-sdio no-mmc cd-gpios disable-wp cap-sd-highspeed rx-fifo-depth tx-fifo-depth snps,multicast-filter-bins snps,perfect-filter-entries snps,fixed-burst snps,no-pbl-x8 snps,force_thresh_dma_mode snps,axi-config snps,tso snps,en-tx-lpi-clockgating snps,txpbl snps,rxpbl phy-handle phy-mode starfive,tx-use-rgmii-clk assigned-clock-parents rx-internal-delay-ps motorcomm,rx-clk-drv-microamp motorcomm,rx-data-drv-microamp motorcomm,tx-clk-adj-enabled motorcomm,tx-clk-10-inverted motorcomm,tx-clk-100-inverted motorcomm,tx-clk-1000-inverted tx-internal-delay-ps dma-channels snps,dma-masters snps,data-width snps,block-size snps,priority snps,axi-max-burst-len #power-domain-cells remote-endpoint power-domains linux,pci-domain interrupt-map-mask interrupt-map msi-controller bus-range perst-gpios ethernet0 i2c0 i2c2 i2c5 i2c6 mmc0 mmc1 serial0 ethernet1 stdout-path simple-audio-card,name format bitclock-master frame-master sound-dai 