  u   8  n   (              nx                                                                   <   ,engicam,icore-mx8mm-edimm2.2 engicam,icore-mx8mm fsl,imx8mm       .   7Engicam i.Core MX8M Mini EDIMM2.2 Starter Kit      aliases       &   =/soc@0/bus@30800000/ethernet@30be0000         "   G/soc@0/bus@30000000/gpio@30200000         "   M/soc@0/bus@30000000/gpio@30210000         "   S/soc@0/bus@30000000/gpio@30220000         "   Y/soc@0/bus@30000000/gpio@30230000         "   _/soc@0/bus@30000000/gpio@30240000         !   e/soc@0/bus@30800000/i2c@30a20000          !   j/soc@0/bus@30800000/i2c@30a30000          !   o/soc@0/bus@30800000/i2c@30a40000          !   t/soc@0/bus@30800000/i2c@30a50000          !   y/soc@0/bus@30800000/mmc@30b40000          !   ~/soc@0/bus@30800000/mmc@30b50000          !   /soc@0/bus@30800000/mmc@30b60000          6   /soc@0/bus@30800000/spba-bus@30800000/serial@30860000         6   /soc@0/bus@30800000/spba-bus@30800000/serial@30890000         6   /soc@0/bus@30800000/spba-bus@30800000/serial@30880000         $   /soc@0/bus@30800000/serial@30a60000       3   /soc@0/bus@30800000/spba-bus@30800000/spi@30820000        3   /soc@0/bus@30800000/spba-bus@30800000/spi@30830000        3   /soc@0/bus@30800000/spba-bus@30800000/spi@30840000        cpus                                 idle-states          psci       cpu-pd-wait          ,arm,idle-state             3                                          
                    cpu@0           &cpu          ,arm,cortex-a53          2            6  l        D              Kpsci            Y           f   @        x                         @                                                    speed_grade                                             
      cpu@1           &cpu          ,arm,cortex-a53          2           6  l        D              Kpsci            Y           f   @        x                         @                                                                                   cpu@2           &cpu          ,arm,cortex-a53          2           6  l        D              Kpsci            Y           f   @        x                         @                                                                                   cpu@3           &cpu          ,arm,cortex-a53          2           6  l        D              Kpsci            Y           f   @        x                         @                                                                                   l2-cache0            ,cache                      [           h   @        z                       opp-table            ,operating-points-v2          )              opp-1200000000          4    G         ; P        I              Z I         k      opp-1600000000          4    _^         ; ~        I              Z I         k      opp-1800000000          4    kI         ; B@        I              Z I         k         clock-osc-32k            ,fixed-clock         w                       osc_32k                  clock-osc-24m            ,fixed-clock         w            n6         osc_24m                  clock-ext1           ,fixed-clock         w            k@      	  clk_ext1                     clock-ext2           ,fixed-clock         w            k@      	  clk_ext2                     clock-ext3           ,fixed-clock         w            k@      	  clk_ext3                     clock-ext4           ,fixed-clock         w            k@      	  clk_ext4                     psci             ,arm,psci-1.0             smc       pmu          ,arm,cortex-a53-pmu                        timer            ,arm,armv8-timer       0                                
           z                thermal-zones      cpu-thermal                                    trips      trip0            L        	          -passive            	      trip1            s        	        	  -critical             cooling-maps       map0               	      0     
                        usbphynop1          (             ,usb-nop-xceiv           D              3              C      2      	  Zmain_clk            f              2      usbphynop2          (             ,usb-nop-xceiv           D              3              C      2      	  Zmain_clk            f              4      soc@0            ,fsl,imx8mm-soc simple-bus                                    t            >           {@       @                         soc_unique_id      bus@30000000             ,fsl,aips-bus simple-bus         20    @                                   t0   0    @     spba-bus@30000000            ,fsl,spba-bus simple-bus                                  20               t   sai@30010000                         ,fsl,imx8mm-sai fsl,imx8mq-sai           20                    _            D                                  Zbus mclk1 mclk2 mclk3                                               rx tx         	  disabled          sai@30020000                         ,fsl,imx8mm-sai fsl,imx8mq-sai           20                    `            D                                  Zbus mclk1 mclk2 mclk3                                              rx tx         	  disabled          sai@30030000                         ,fsl,imx8mm-sai fsl,imx8mq-sai           20                    2            D                                  Zbus mclk1 mclk2 mclk3                                              rx tx         	  disabled          sai@30050000                         ,fsl,imx8mm-sai fsl,imx8mq-sai           20                    Z            D                                  Zbus mclk1 mclk2 mclk3                               	               rx tx         	  disabled          sai@30060000                         ,fsl,imx8mm-sai fsl,imx8mq-sai           20                    Z            D                                  Zbus mclk1 mclk2 mclk3                  
                            rx tx         	  disabled          audio-controller@30080000            ,fsl,imx8mm-micfil           20           0         m          n          ,          -         (  D                  &      '            )  Zipg_clk ipg_clk_app pll8k pll11k clkext3                                rx        	  disabled          spdif@30090000           ,fsl,imx35-spdif         20	                             P  D      ^            r                           ^                           :  Zcore rxtx0 rxtx1 rxtx2 rxtx3 rxtx4 rxtx5 rxtx6 rxtx7 spba                                              rx tx         	  disabled             gpio@30200000            ,fsl,imx8mm-gpio fsl,imx35-gpio          20                     @          A           D                                                                
              $      gpio@30210000            ,fsl,imx8mm-gpio fsl,imx35-gpio          20!                    B          C           D                                                                (         gpio@30220000            ,fsl,imx8mm-gpio fsl,imx35-gpio          20"                    D          E           D                                                                =              ,      gpio@30230000            ,fsl,imx8mm-gpio fsl,imx35-gpio          20#                    F          G           D                                                                W          gpio@30240000            ,fsl,imx8mm-gpio fsl,imx35-gpio          20$                    H          I           D                                                                w         tmu@30260000             ,fsl,imx8mm-tmu          20&             D                                   watchdog@30280000            ,fsl,imx8mm-wdt fsl,imx21-wdt            20(                    N           D            	  disabled          watchdog@30290000            ,fsl,imx8mm-wdt fsl,imx21-wdt            20)                    O           D            	  disabled          watchdog@302a0000            ,fsl,imx8mm-wdt fsl,imx21-wdt            20*                    
           D            	  disabled          dma-controller@302c0000           ,fsl,imx8mm-sdma fsl,imx8mq-sdma         20,                    g           D                    Zipg ahb                    imx/sdma/sdma-imx7d.bin                  dma-controller@302b0000           ,fsl,imx8mm-sdma fsl,imx8mq-sdma         20+                    "           D                    Zipg ahb                    imx/sdma/sdma-imx7d.bin       pinctrl@30330000             ,fsl,imx8mm-iomuxc           203                   fec1grp      h  5   h                    l                 p                    t                    x                    |                                                                                                                                                                                      x                         *      i2c1grp       0  5    |            @                 @                  usdhc3grp           5  8                 <                                                    $                 $                 (                 0                    h                 l                 p                  d                        %      usdhc3-100mhzgrp           5  8                 <                                                    $                 (                 0                    h                 l                 p                  d                        &      usdhc3-200mhzgrp           5  8                 <                                                    $                 (                 0                    h                 l                 p                  d                        '      i2c2grp       0  5                @                  @                   i2c4grp       0  5  ,              @   0              @            !      uart2grp          0  5  <              @  @                @                 usdhc1gpiogrp           5   @                 A           #      usdhc1grp           5                                                                                                                             "         iomuxc-gpr@30340000       2   ,fsl,imx8mm-iomuxc-gpr fsl,imx6q-iomuxc-gpr syscon           204                )      efuse@30350000           ,fsl,imx8mm-ocotp syscon         205             D                                  unique-id@4         2                       speed-grade@10          2                       mac-address@90          2                 (         anatop@30360000          ,fsl,imx8mm-anatop syscon            206           snvs@30370000         #   ,fsl,sec-v4.0-mon syscon simple-mfd          207                   snvs-rtc-lp          ,fsl,sec-v4.0-mon-rtc-lp         >           E   4                                    D            	  Zsnvs-rtc          snvs-powerkey            ,fsl,sec-v4.0-pwrkey         >                             D              Zsnvs-pwrkey         L   t         Z      	  disabled          snvs-lpgpr        +   ,fsl,imx8mm-snvs-lpgpr fsl,imx7d-snvs-lpgpr           clock-controller@30380000            ,fsl,imx8mm-ccm          208             w           D                        4  Zosc_32k osc_24m clk_ext1 clk_ext2 clk_ext3 clk_ext4       @  3      B            [      ^      `                           C      8      ,      /      8         h            ׄ ׄ ,#gp                   reset-controller@30390000         %   ,fsl,imx8mm-src fsl,imx8mq-src syscon            209                    Y           }                    gpc@303a0000             ,fsl,imx8mm-gpc          20:                    W                                       pgc                              power-domain@0                      2            D      X        3      X        C      @                 power-domain@1                      2           f           D                 7      power-domain@2                      2                    power-domain@3                      2                    power-domain@4                      2           D            Z        3      Y      Z        C      8      8        h/ ׄ                  power-domain@5                      2            D      Z                                         f              9      power-domain@6                      2           D              3      T        C      8           ;      power-domain@7                      2              <      power-domain@8                      2              =      power-domain@9                      2   	           >      power-domain@10                     2   
        D                    3      U      V        C      A      8        he             /      power-domain@11                     2              0               bus@30400000             ,fsl,aips-bus simple-bus         20@   @                                   t0@  0@   @     pwm@30660000             ,fsl,imx8mm-pwm fsl,imx27-pwm            20f                    Q           D                    Zipg per                  	  disabled          pwm@30670000             ,fsl,imx8mm-pwm fsl,imx27-pwm            20g                    R           D                    Zipg per                  	  disabled          pwm@30680000             ,fsl,imx8mm-pwm fsl,imx27-pwm            20h                    S           D                    Zipg per                  	  disabled          pwm@30690000             ,fsl,imx8mm-pwm fsl,imx27-pwm            20i                    T           D                    Zipg per                  	  disabled          timer@306a0000           ,nxp,sysctr-timer            20j                    /           D           Zper          bus@30800000             ,fsl,aips-bus simple-bus         20   @                                   t0  0   @              spba-bus@30800000            ,fsl,spba-bus simple-bus                                  20              t   spi@30820000          !   ,fsl,imx8mm-ecspi fsl,imx51-ecspi                                      20                               D                    Zipg per                                           rx tx         	  disabled          spi@30830000          !   ,fsl,imx8mm-ecspi fsl,imx51-ecspi                                      20                                D                    Zipg per                                          rx tx         	  disabled          spi@30840000          !   ,fsl,imx8mm-ecspi fsl,imx51-ecspi                                      20                    !           D                    Zipg per                                          rx tx         	  disabled          serial@30860000          ,fsl,imx8mm-uart fsl,imx6q-uart          20                               D                    Zipg per                                            rx tx         	  disabled          serial@30880000          ,fsl,imx8mm-uart fsl,imx6q-uart          20                               D                    Zipg per                                            rx tx         	  disabled          serial@30890000          ,fsl,imx8mm-uart fsl,imx6q-uart          20                               D                    Zipg per         okay            default                     crypto@30900000          ,fsl,sec-v4.0                                     20             t    0                    [           D      ]      _      	  Zaclk ipg       jr@1000          ,fsl,sec-v4.0-job-ring           2                     i         	  disabled          jr@2000          ,fsl,sec-v4.0-job-ring           2                      j         jr@3000          ,fsl,sec-v4.0-job-ring           2  0                   r            i2c@30a20000             ,fsl,imx8mm-i2c fsl,imx21-i2c                                      20                    #           D              okay                     default               pmic@8           ,nxp,pf8121a         2      regulators     ldo1             `         LK@                        ldo2             `         LK@                        ldo3             `         LK@                        ldo4             `         LK@                        buck1                     w@                        buck2                     w@                        buck3                     w@                        buck4                     w@                                   buck5                     w@                        buck6                     w@                        buck7            2Z         2Z                        vsnvs            w@         2Z                                 i2c@30a30000             ,fsl,imx8mm-i2c fsl,imx21-i2c                                      20                    $           D              okay                     default                   i2c@30a40000                                       ,fsl,imx8mm-i2c fsl,imx21-i2c            20                    %           D            	  disabled          i2c@30a50000             ,fsl,imx8mm-i2c fsl,imx21-i2c                                      20                    &           D              okay                     default            !      serial@30a60000          ,fsl,imx8mm-uart fsl,imx6q-uart          20                               D                    Zipg per                                            rx tx         	  disabled          mailbox@30aa0000             ,fsl,imx8mm-mu fsl,imx6sx-mu         20                    X           D                       mmc@30b40000          !   ,fsl,imx8mm-usdhc fsl,imx7d-usdhc            20                               D      _      S              Zipg ahb per         *           ?           O           okay            default            "   #        Y   $              b         p         y      mmc@30b50000          !   ,fsl,imx8mm-usdhc fsl,imx7d-usdhc            20                               D      _      S              Zipg ahb per         *           ?           O         	  disabled          mmc@30b60000          !   ,fsl,imx8mm-usdhc fsl,imx7d-usdhc            20                               D      _      S              Zipg ahb per         *           ?           O           okay          "  default state_100mhz state_200mhz              %           &           '               spi@30bb0000                                       ,nxp,imx8mm-fspi         20                   fspi_base fspi_mmap                k           D                    Zfspi_en fspi          	  disabled          dma-controller@30bd0000           ,fsl,imx8mm-sdma fsl,imx8mq-sdma         20                               D            ]        Zipg ahb                    imx/sdma/sdma-imx7d.bin                  ethernet@30be0000         -   ,fsl,imx8mm-fec fsl,imx8mq-fec fsl,imx6sx-fec            20           0         v          w          x          y         (  D                  u      t      v      "  Zipg ahb ptp enet_clk_ref enet_out            3      R      u      t      v         C      6      :      ;      9        h     sY@                                     (        mac-address            )              okay            default            *      	  rgmii-id               +   mdio                                 ethernet-phy@3           ,ethernet-phy-ieee802.3-c22          2              ,                '           +               bus@32c00000             ,fsl,aips-bus simple-bus         22   @                                   t2  2   @     csi@32e20000             ,fsl,imx8mm-csi fsl,imx7-csi         22                               D              Zmclk            f   -          	  disabled       port       endpoint               .           1            blk-ctrl@32e28000             ,fsl,imx8mm-disp-blk-ctrl syscon         22            f   /   /   /   0   0      '  -bus csi-bridge lcdif mipi-dsi mipi-csi        P  D                                                                  o  Zcsi-bridge-axi csi-bridge-apb csi-bridge-core lcdif-axi lcdif-apb lcdif-pix dsi-pclk dsi-ref csi-aclk csi-pclk                        -      mipi-csi@32e30000            ,fsl,imx8mm-mipi-csi2            22                               3                    C      A      A        -@         D                                Zpclk wrap phy axi           f   -         	  disabled       ports                                port@0          2          port@1          2      endpoint               1           .               usb@32e40000             ,fsl,imx8mm-usb fsl,imx7d-usb            22                    (           D              Zusb1_ctrl_root_clk          3      X        C      @        @   2        E   3            f         	  disabled          usbmisc@32e40200          %   ,fsl,imx8mm-usbmisc fsl,imx7d-usbmisc            Q           22               3      usb@32e50000             ,fsl,imx8mm-usb fsl,imx7d-usb            22                    )           D              Zusb1_ctrl_root_clk          3      X        C      @        @   4        E   5            f         	  disabled          usbmisc@32e50200          %   ,fsl,imx8mm-usbmisc fsl,imx7d-usbmisc            Q           22               5      pcie-phy@32f00000            ,fsl,imx8mm-pcie-phy         22             D      h        Zref         3      h        h         C      :                      ^pciephy         (          	  disabled               8         dma-controller@33000000       &   ,fsl,imx7d-dma-apbh fsl,imx28-dma-apbh           23             0                                                  jgpmi0 gpmi1 gpmi2 gpmi3                    z           D                 6      nand-controller@33002000          )   ,fsl,imx8mm-gpmi-nand fsl,imx7d-gpmi-nand                                      23       3 @   @         gpmi-nand bch                             jbch         D                    Zgpmi_io gpmi_bch_apb               6            rx-tx         	  disabled          pcie@33800000            ,fsl,imx8mm-pcie         23   @               dbi config                                   &pci                      0  t                                                                            z           jmsi                                                                    }                            |                            {                            z                                  f   7                            ^apps turnoff            @   8      	  pcie-phy          	  disabled          gpu@38000000             ,vivante,gc          28                                 D      Z                          Zreg bus core shader         3            *        C      *        h    ;         f   9      gpu@38008000             ,vivante,gc          28                               D      Z                    Zreg bus core            3            *        C      *        h    ;         f   9      video-codec@38300000             ,nxp,imx8mm-vpu-g1           280                               D              f   :          video-codec@38310000             ,nxp,imx8mq-vpu-g2           281                               D              f   :         blk-ctrl@38330000            ,fsl,imx8mm-vpu-blk-ctrl syscon          283             f   ;   <   =   >        -bus g1 g2 h1            D                        	  Zg1 g2 h1            3      c      d        C      +      +        h#F #F                       :      interrupt-controller@38800000            ,arm,gic-v3          28     8                                       	                    memory-controller@3d400000           ,fsl,imx8mm-ddrc fsl,imx8m-ddrc          2=@   @          Zcore pll alt apb             D                  a      b      ddr-pmu@3d800000          %   ,fsl,imx8mm-ddr-pmu fsl,imx8m-ddr-pmu            2=   @                 b            chosen        6  /soc@0/bus@30800000/spba-bus@30800000/serial@30890000            	interrupt-parent #address-cells #size-cells compatible model ethernet0 gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 mmc0 mmc1 mmc2 serial0 serial1 serial2 serial3 spi0 spi1 spi2 entry-method arm,psci-suspend-param local-timer-stop entry-latency-us exit-latency-us min-residency-us phandle device_type reg clock-latency clocks enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache operating-points-v2 nvmem-cells nvmem-cell-names cpu-idle-states #cooling-cells cpu-supply cache-level opp-shared opp-hz opp-microvolt opp-supported-hw clock-latency-ns opp-suspend #clock-cells clock-frequency clock-output-names interrupts arm,no-tick-in-suspend polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device #phy-cells assigned-clocks assigned-clock-parents clock-names power-domains ranges dma-ranges #sound-dai-cells dmas dma-names status gpio-controller #gpio-cells interrupt-controller #interrupt-cells gpio-ranges #thermal-sensor-cells #dma-cells fsl,sdma-ram-script-name fsl,pins regmap offset linux,keycode wakeup-source assigned-clock-rates #reset-cells #power-domain-cells resets #pwm-cells pinctrl-names pinctrl-0 regulator-min-microvolt regulator-max-microvolt regulator-always-on regulator-boot-on #mbox-cells fsl,tuning-start-tap fsl,tuning-step bus-width cd-gpios max-frequency no-1-8-v keep-power-in-suspend pinctrl-1 pinctrl-2 non-removable reg-names fsl,num-tx-queues fsl,num-rx-queues fsl,stop-mode phy-mode phy-handle reset-gpios reset-assert-us remote-endpoint power-domain-names phys fsl,usbmisc #index-cells reset-names interrupt-names dma-channels bus-range num-lanes num-viewport interrupt-map-mask interrupt-map fsl,max-link-speed linux,pci-domain phy-names stdout-path 