     8  l   (            T  4                                                                   3   ,Gateworks Venice GW71xx-0x i.MX8MM Development Kit           2gw,imx8mm-gw71xx-0x fsl,imx8mm     aliases       &   =/soc@0/bus@30800000/ethernet@30be0000         "   G/soc@0/bus@30000000/gpio@30200000         "   M/soc@0/bus@30000000/gpio@30210000         "   S/soc@0/bus@30000000/gpio@30220000         "   Y/soc@0/bus@30000000/gpio@30230000         "   _/soc@0/bus@30000000/gpio@30240000         !   e/soc@0/bus@30800000/i2c@30a20000          !   j/soc@0/bus@30800000/i2c@30a30000          !   o/soc@0/bus@30800000/i2c@30a40000          !   t/soc@0/bus@30800000/i2c@30a50000          !   y/soc@0/bus@30800000/mmc@30b40000          !   ~/soc@0/bus@30800000/mmc@30b50000          !   /soc@0/bus@30800000/mmc@30b60000          6   /soc@0/bus@30800000/spba-bus@30800000/serial@30860000         6   /soc@0/bus@30800000/spba-bus@30800000/serial@30890000         6   /soc@0/bus@30800000/spba-bus@30800000/serial@30880000         $   /soc@0/bus@30800000/serial@30a60000       3   /soc@0/bus@30800000/spba-bus@30800000/spi@30820000        3   /soc@0/bus@30800000/spba-bus@30800000/spi@30830000        3   /soc@0/bus@30800000/spba-bus@30800000/spi@30840000        !   /soc@0/bus@32c00000/usb@32e40000          !   /soc@0/bus@32c00000/usb@32e50000          cpus                                 idle-states          psci       cpu-pd-wait          2arm,idle-state             3                                         
        (            cpu@0           0cpu          2arm,cortex-a53          <            @  l        N              Upsci            c           p   @                                 @                                                    speed_grade                                          (   
      cpu@1           0cpu          2arm,cortex-a53          <           @  l        N              Upsci            c           p   @                                 @                                                                          (         cpu@2           0cpu          2arm,cortex-a53          <           @  l        N              Upsci            c           p   @                                 @                                                                          (         cpu@3           0cpu          2arm,cortex-a53          <           @  l        N              Upsci            c           p   @                                 @                                                                          (         l2-cache0            2cache           '           e           r   @                   (            opp-table            2operating-points-v2          3        (      opp-1200000000          >    G         E P        S              d I         u      opp-1600000000          >    _^         E ~        S              d I         u      opp-1800000000          >    kI         E B@        S              d I         u         clock-osc-32k            2fixed-clock                                osc_32k         (         clock-osc-24m            2fixed-clock                     n6         osc_24m         (         clock-ext1           2fixed-clock                     k@      	  clk_ext1            (         clock-ext2           2fixed-clock                     k@      	  clk_ext2            (         clock-ext3           2fixed-clock                     k@      	  clk_ext3            (         clock-ext4           2fixed-clock                     k@      	  clk_ext4            (         psci             2arm,psci-1.0             smc       pmu          2arm,cortex-a53-pmu                        timer            2arm,armv8-timer       0                                
           z                thermal-zones      cpu-thermal                                    trips      trip0            L                  7passive         (   	      trip1            s                	  7critical             cooling-maps       map0               	      0  #   
                        usbphynop1          2             2usb-nop-xceiv           N              =              M      2      	  dmain_clk            p           (   9      usbphynop2          2             2usb-nop-xceiv           N              =              M      2      	  dmain_clk            p           (   <      soc@0            2fsl,imx8mm-soc simple-bus                                    ~            >           @       @                         soc_unique_id      bus@30000000             2fsl,aips-bus simple-bus         <0    @                                   ~0   0    @     spba-bus@30000000            2fsl,spba-bus simple-bus                                  <0               ~   sai@30010000                         2fsl,imx8mm-sai fsl,imx8mq-sai           <0                    _            N                                  dbus mclk1 mclk2 mclk3                                               rx tx         	  disabled          sai@30020000                         2fsl,imx8mm-sai fsl,imx8mq-sai           <0                    `            N                                  dbus mclk1 mclk2 mclk3                                              rx tx         	  disabled          sai@30030000                         2fsl,imx8mm-sai fsl,imx8mq-sai           <0                    2            N                                  dbus mclk1 mclk2 mclk3                                              rx tx         	  disabled          sai@30050000                         2fsl,imx8mm-sai fsl,imx8mq-sai           <0                    Z            N                                  dbus mclk1 mclk2 mclk3                               	               rx tx         	  disabled          sai@30060000                         2fsl,imx8mm-sai fsl,imx8mq-sai           <0                    Z            N                                  dbus mclk1 mclk2 mclk3                  
                            rx tx         	  disabled          audio-controller@30080000            2fsl,imx8mm-micfil           <0           0         m          n          ,          -         (  N                  &      '            )  dipg_clk ipg_clk_app pll8k pll11k clkext3                                rx                    	  disabled          spdif@30090000           2fsl,imx35-spdif         <0	                             P  N      ^            r                           ^                           :  dcore rxtx0 rxtx1 rxtx2 rxtx3 rxtx4 rxtx5 rxtx6 rxtx7 spba                                              rx tx         	  disabled             gpio@30200000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0                     @          A           N                                                                
         3        pci_usb_sel dio0  dio1                                (   M      gpio@30210000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0!                    B          C           N                                                                (           (   '      gpio@30220000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0"                    D          E           N                                                                =         gpio@30230000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0#                    F          G           N                                                                W          1     dio2 dio3   pci_wdis#                                    (   +      gpio@30240000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0$                    H          I           N                                                                w           (   !      tmu@30260000             2fsl,imx8mm-tmu          <0&             N                          (         watchdog@30280000            2fsl,imx8mm-wdt fsl,imx21-wdt            <0(                    N           N              okay            +default         9            C      watchdog@30290000            2fsl,imx8mm-wdt fsl,imx21-wdt            <0)                    O           N            	  disabled          watchdog@302a0000            2fsl,imx8mm-wdt fsl,imx21-wdt            <0*                    
           N            	  disabled          dma-controller@302c0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         <0,                    g           N                    dipg ahb         X           cimx/sdma/sdma-imx7d.bin         (         dma-controller@302b0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         <0+                    "           N                    dipg ahb         X           cimx/sdma/sdma-imx7d.bin       pinctrl@30330000             2fsl,imx8mm-iomuxc           <03             +default         9           (      fec1grp      h  |   h                    l                 p                    t                    x                    |                                                                                                                                                                                       \                      (   2      gscgrp          |                   Y        (   &      i2c1grp       0  |    |            @                 @         (   %      i2c2grp       0  |                @                  @         (   )      uart2grp          0  |  <              @  @                @        (   $      usdhc3grp          |  8                 <                                                    $                 (                 0                    h                 l                 p                  d                     (   -      usdhc3-100mhzgrp           |  8                 <                                                    $                 (                 0                    h                 l                 p                  d                     (   .      usdhc3-200mhzgrp           |  8                 <                                                    $                 (                 0                    h                 l                 p                  d                     (   /      wdoggrp         |   0                        (         hoggrp          |    P           @  A   @              @  A  x             @  A   D              @  A   L              @  A  h             @  A  l             @  A        (         accelgrp            |  p               Y        (   *      gpioledgrp        0  |    X                  T                      (   K      i2c3grp       0  |  $              @   (              @         (   ,      pcie0grp            |  t                A        (   B      ppsgrp          |   d                 A        (   L      spi2grp       `  |    l                   p                   t                   x                      (          uart1grp          0  |  4              @  8                @        (   "      uart3grp          0  |  D             @  H                @        (   #      usbotg1grp        0  |   X                A   \                A        (   ;         iomuxc-gpr@30340000       2   2fsl,imx8mm-iomuxc-gpr fsl,imx6q-iomuxc-gpr syscon           <04             (   1      efuse@30350000           2fsl,imx8mm-ocotp syscon         <05             N                                  unique-id@4         <              (         speed-grade@10          <              (         mac-address@90          <              (   0         anatop@30360000          2fsl,imx8mm-anatop syscon            <06           snvs@30370000         #   2fsl,sec-v4.0-mon syscon simple-mfd          <07             (      snvs-rtc-lp          2fsl,sec-v4.0-mon-rtc-lp                       4                                    N            	  dsnvs-rtc          snvs-powerkey            2fsl,sec-v4.0-pwrkey                                      N              dsnvs-pwrkey            t               	  disabled          snvs-lpgpr        +   2fsl,imx8mm-snvs-lpgpr fsl,imx7d-snvs-lpgpr           clock-controller@30380000            2fsl,imx8mm-ccm          <08                        N                        4  dosc_32k osc_24m clk_ext1 clk_ext2 clk_ext3 clk_ext4       @  =      B            [      ^      `                           M      8      ,      /      8                     ׄ ׄ ,#gp          (         reset-controller@30390000         %   2fsl,imx8mm-src fsl,imx8mq-src syscon            <09                    Y                      (         gpc@303a0000             2fsl,imx8mm-gpc          <0:                    W                                       pgc                              power-domain@0                      <            N      X        =      X        M      @        (         power-domain@1                      <           p           N              (   @      power-domain@2                      <           (         power-domain@3                      <           (         power-domain@4                      <           N            Z        =      Y      Z        M      8      8        / ׄ         (         power-domain@5                      <            N      Z                                         p           (   C      power-domain@6                      <           N              =      T        M      8        (   E      power-domain@7                      <           (   F      power-domain@8                      <           (   G      power-domain@9                      <   	        (   H      power-domain@10                     <   
        N                    =      U      V        M      A      8        e          (   6      power-domain@11                     <           (   7               bus@30400000             2fsl,aips-bus simple-bus         <0@   @                                   ~0@  0@   @     pwm@30660000             2fsl,imx8mm-pwm fsl,imx27-pwm            <0f                    Q           N                    dipg per                  	  disabled          pwm@30670000             2fsl,imx8mm-pwm fsl,imx27-pwm            <0g                    R           N                    dipg per                  	  disabled          pwm@30680000             2fsl,imx8mm-pwm fsl,imx27-pwm            <0h                    S           N                    dipg per                  	  disabled          pwm@30690000             2fsl,imx8mm-pwm fsl,imx27-pwm            <0i                    T           N                    dipg per                  	  disabled          timer@306a0000           2nxp,sysctr-timer            <0j                    /           N           dper          bus@30800000             2fsl,aips-bus simple-bus         <0   @                                   ~0  0   @              spba-bus@30800000            2fsl,spba-bus simple-bus                                  <0              ~   spi@30820000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      <0                               N                    dipg per                                           rx tx         	  disabled          spi@30830000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      <0                                N                    dipg per                                          rx tx           okay            +default         9               !            spi@30840000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      <0                    !           N                    dipg per                                          rx tx         	  disabled          serial@30860000          2fsl,imx8mm-uart fsl,imx6q-uart          <0                               N                    dipg per                                            rx tx           okay            +default         9   "      serial@30880000          2fsl,imx8mm-uart fsl,imx6q-uart          <0                               N                    dipg per                                            rx tx           okay            +default         9   #      serial@30890000          2fsl,imx8mm-uart fsl,imx6q-uart          <0                               N                    dipg per         okay            +default         9   $         crypto@30900000          2fsl,sec-v4.0                                     <0             ~    0                    [           N      ]      _      	  daclk ipg       jr@1000          2fsl,sec-v4.0-job-ring           <                     i         	  disabled          jr@2000          2fsl,sec-v4.0-job-ring           <                      j         jr@3000          2fsl,sec-v4.0-job-ring           <  0                   r            i2c@30a20000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      <0                    #           N              okay                     +default         9   %   gsc@20           2gw,gsc          <            9   &             '                                                                    (   (   adc          2gw,gsc-adc                               channel@6                        <           temp          channel@8                       <           vdd_bat       channel@16                      <         	  fan_tach          channel@82                      <           vdd_vin           VT        channel@84                      <         	  vdd_adc1              '  '      channel@86                      <         	  vdd_adc2              '  '      channel@88                      <         	  vdd_dram          channel@8c                      <           vdd_1p2       channel@8e                      <           vdd_1p0       channel@90                      <           vdd_2p5           '  '      channel@92                      <           vdd_3p3           '  '      channel@98                      <         	  vdd_0p95          channel@9a                      <           vdd_1p8       channel@a2                      <           vdd_gsc           '  '         fan-controller@0                                       2gw,gsc-fan          <   
         gpio@23          2nxp,pca9555         <   #                                 (                   (   J      eeprom@50            2atmel,24c02         <   P        &         eeprom@51            2atmel,24c02         <   Q        &         eeprom@52            2atmel,24c02         <   R        &         eeprom@53            2atmel,24c02         <   S        &         rtc@68           2dallas,ds1672           <   h      pmic@69          2mps,mp5416          <   i   regulators     buck1           /buck1           > 5         V B@        n 9         g                        buck2           /buck2           > 5         V         n !         OX                        buck3           /buck3           > 5         V B@        n 9         g                 (         buck4           /buck4           > w@        V w@        n !         OX                        ldo1            /ldo1            > w@        V w@                        ldo2            /ldo2            > 5         V 5                         ldo3            /ldo3            >         V                         ldo4            /ldo4            > w@        V w@                                 i2c@30a30000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      <0                    $           N              okay                     +default         9   )   eeprom@52            2atmel,24c32         <   R        &          accelerometer@19            +default         9   *         2st,lis2de12         <                           +                      INT1             i2c@30a40000                                       2fsl,imx8mm-i2c fsl,imx21-i2c            <0                    %           N              okay                     +default         9   ,      i2c@30a50000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      <0                    &           N            	  disabled          serial@30a60000          2fsl,imx8mm-uart fsl,imx6q-uart          <0                               N                    dipg per                                            rx tx         	  disabled          mailbox@30aa0000             2fsl,imx8mm-mu fsl,imx6sx-mu         <0                    X           N                       mmc@30b40000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            <0                               N      _      S              dipg ahb per                                        	  disabled          mmc@30b50000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            <0                               N      _      S              dipg ahb per                                        	  disabled          mmc@30b60000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            <0                               N      _      S              dipg ahb per                                          okay          "  +default state_100mhz state_200mhz           9   -           .        '   /         1      spi@30bb0000                                       2nxp,imx8mm-fspi         <0                   ?fspi_base fspi_mmap                k           N                    dfspi_en fspi          	  disabled          dma-controller@30bd0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         <0                               N            ]        dipg ahb         X           cimx/sdma/sdma-imx7d.bin         (         ethernet@30be0000         -   2fsl,imx8mm-fec fsl,imx8mq-fec fsl,imx6sx-fec            <0           0         v          w          x          y         (  N                  u      t      v      "  dipg ahb ptp enet_clk_ref enet_out            =      R      u      t      v         M      6      :      ;      9             sY@            I           [              0        mac-address         m   1              okay            +default         9   2      	  {rgmii-id               3   mdio                                 ethernet-phy@0           2ethernet-phy-ieee802.3-c22          <                                                        (   3               bus@32c00000             2fsl,aips-bus simple-bus         <2   @                                   ~2  2   @     csi@32e20000             2fsl,imx8mm-csi fsl,imx7-csi         <2                               N              dmclk            p   4          	  disabled       port       endpoint               5        (   8            blk-ctrl@32e28000             2fsl,imx8mm-disp-blk-ctrl syscon         <2            p   6   6   6   7   7      '  bus csi-bridge lcdif mipi-dsi mipi-csi        P  N                                                                  o  dcsi-bridge-axi csi-bridge-apb csi-bridge-core lcdif-axi lcdif-apb lcdif-pix dsi-pclk dsi-ref csi-aclk csi-pclk                     (   4      mipi-csi@32e30000            2fsl,imx8mm-mipi-csi2            <2                               =              M      A        -@         N                                dpclk wrap phy axi           p   4         	  disabled       ports                                port@0          <          port@1          <      endpoint               8        (   5               usb@32e40000             2fsl,imx8mm-usb fsl,imx7d-usb            <2                    (           N              dusb1_ctrl_root_clk          =      X        M      @           9           :            p           okay            +default         9   ;        	otg                usbmisc@32e40200          %   2fsl,imx8mm-usbmisc fsl,imx7d-usbmisc            )           <2            (   :      usb@32e50000             2fsl,imx8mm-usb fsl,imx7d-usb            <2                    )           N              dusb1_ctrl_root_clk          =      X        M      @           <           =            p           okay            	host             6      usbmisc@32e50200          %   2fsl,imx8mm-usbmisc fsl,imx7d-usbmisc            )           <2            (   =      pcie-phy@32f00000            2fsl,imx8mm-pcie-phy         <2             N   >        dref         =      h                 M      :                      Kpciephy         2            okay            W            k        (   A         dma-controller@33000000       &   2fsl,imx7d-dma-apbh fsl,imx28-dma-apbh           <3             0                                                  gpmi0 gpmi1 gpmi2 gpmi3         X                      N              (   ?      nand-controller@33002000          )   2fsl,imx8mm-gpmi-nand fsl,imx7d-gpmi-nand                                      <3       3 @   @         ?gpmi-nand bch                             bch         N                    dgpmi_io gpmi_bch_apb               ?            rx-tx         	  disabled          pcie@33800000            2fsl,imx8mm-pcie         <3   @               ?dbi config                                   0pci                      0  ~                                                                            z           msi                                                                    }                            |                            {                            z                                  p   @                            Kapps turnoff               A      	  pcie-phy            okay            +default         9   B           +              N            i   >        dpcie pcie_aux pcie_bus          =      i      g         沀        M      9      >      gpu@38000000             2vivante,gc          <8                                 N      Z                          dreg bus core shader         =            *        M      *            /         p   C      gpu@38008000             2vivante,gc          <8                               N      Z                    dreg bus core            =            *        M      *            /         p   C      video-codec@38300000             2nxp,imx8mm-vpu-g1           <80                               N              p   D          video-codec@38310000             2nxp,imx8mq-vpu-g2           <81                               N              p   D         blk-ctrl@38330000            2fsl,imx8mm-vpu-blk-ctrl syscon          <83             p   E   F   G   H        bus g1 g2 h1            N                        	  dg1 g2 h1            =      c      d        M      +      +        #F #F                    (   D      interrupt-controller@38800000            2arm,gic-v3          <8     8                                       	           (         memory-controller@3d400000           2fsl,imx8mm-ddrc fsl,imx8m-ddrc          <=@   @          dcore pll alt apb             N                  a      b           I   opp-table            2operating-points-v2         (   I   opp-25M         >    }x@      opp-100M            >           opp-750M            >    ,            ddr-pmu@3d800000          %   2fsl,imx8mm-ddr-pmu fsl,imx8m-ddr-pmu            <=   @                 b            memory@40000000         0memory          <    @                gpio-keys         
   2gpio-keys      key-user-pb         user_pb            J              
         key-user-pb1x         
  user_pb1x           
               (                  key-erased          key_erased          
               (                 key-eeprom-wp         
  eeprom_wp           
               (                 key-tamper          tamper          
               (                 switch-hold         switch_hold         
               (                    led-controller        
   2gpio-leds           +default         9   K   led-0           status                        !               $on        
  2heartbeat         led-1           status                        !               $off          pcie0-refclk             2fixed-clock                              (   >      pps       	   2pps-gpio            +default         9   L           M               okay          chosen        6  H/soc@0/bus@30800000/spba-bus@30800000/serial@30890000            	interrupt-parent #address-cells #size-cells model compatible ethernet0 gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 mmc0 mmc1 mmc2 serial0 serial1 serial2 serial3 spi0 spi1 spi2 usb0 usb1 entry-method arm,psci-suspend-param local-timer-stop entry-latency-us exit-latency-us min-residency-us phandle device_type reg clock-latency clocks enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache operating-points-v2 nvmem-cells nvmem-cell-names cpu-idle-states #cooling-cells cpu-supply cache-level opp-shared opp-hz opp-microvolt opp-supported-hw clock-latency-ns opp-suspend #clock-cells clock-frequency clock-output-names interrupts arm,no-tick-in-suspend polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device #phy-cells assigned-clocks assigned-clock-parents clock-names power-domains ranges dma-ranges #sound-dai-cells dmas dma-names status gpio-controller #gpio-cells interrupt-controller #interrupt-cells gpio-ranges gpio-line-names #thermal-sensor-cells pinctrl-names pinctrl-0 fsl,ext-reset-output #dma-cells fsl,sdma-ram-script-name fsl,pins regmap offset linux,keycode wakeup-source assigned-clock-rates #reset-cells #power-domain-cells resets #pwm-cells cs-gpios gw,mode label gw,voltage-divider-ohms pagesize regulator-name regulator-min-microvolt regulator-max-microvolt regulator-min-microamp regulator-max-microamp regulator-boot-on regulator-always-on st,drdy-int-pin interrupt-names #mbox-cells fsl,tuning-start-tap fsl,tuning-step bus-width pinctrl-1 pinctrl-2 non-removable reg-names fsl,num-tx-queues fsl,num-rx-queues fsl,stop-mode phy-mode phy-handle ti,rx-internal-delay ti,tx-internal-delay tx-fifo-depth rx-fifo-depth remote-endpoint power-domain-names phys fsl,usbmisc dr_mode over-current-active-low #index-cells disable-over-current reset-names fsl,refclk-pad-mode fsl,clkreq-unsupported dma-channels bus-range num-lanes num-viewport interrupt-map-mask interrupt-map fsl,max-link-speed linux,pci-domain phy-names reset-gpio linux,code function color default-state linux,default-trigger stdout-path 