#include "CPUDyntransComponent.h"
Go to the source code of this file.
Classes | |
struct | mips_cpu_type_def |
class | MIPS_CPUComponent |
A Component representing a MIPS processor. More... | |
Macros | |
#define | MIPS_INITIAL_PC ((int32_t) 0xbfc00000) |
#define | MIPS_INITIAL_STACK_POINTER ((int32_t) 0xa0008000 - 256) |
#define | N_MIPS_FCRS 32 |
#define | MIPS_FPU_FCIR 0 |
#define | MIPS_FPU_FCCR 25 |
#define | MIPS_FPU_FCSR 31 |
#define | MIPS_FCSR_FCC0_SHIFT 23 |
#define | MIPS_FCSR_FCC1_SHIFT 25 |
#define | N_MIPS_COPROCS 4 |
#define | N_MIPS_GPRS 32 /* General purpose registers */ |
#define | N_MIPS_FPRS 32 /* Floating point registers */ |
#define | MIPS_OLDABI_REGISTER_NAMES |
#define | MIPS_REGISTER_NAMES |
#define | MIPS_GPR_ZERO 0 /* zero */ |
#define | MIPS_GPR_AT 1 /* at */ |
#define | MIPS_GPR_V0 2 /* v0 */ |
#define | MIPS_GPR_V1 3 /* v1 */ |
#define | MIPS_GPR_A0 4 /* a0 */ |
#define | MIPS_GPR_A1 5 /* a1 */ |
#define | MIPS_GPR_A2 6 /* a2 */ |
#define | MIPS_GPR_A3 7 /* a3 */ |
#define | MIPS_GPR_T0 8 /* t0 */ |
#define | MIPS_GPR_T1 9 /* t1 */ |
#define | MIPS_GPR_T2 10 /* t2 */ |
#define | MIPS_GPR_T3 11 /* t3 */ |
#define | MIPS_GPR_T4 12 /* t4 */ |
#define | MIPS_GPR_T5 13 /* t5 */ |
#define | MIPS_GPR_T6 14 /* t6 */ |
#define | MIPS_GPR_T7 15 /* t7 */ |
#define | MIPS_GPR_S0 16 /* s0 */ |
#define | MIPS_GPR_S1 17 /* s1 */ |
#define | MIPS_GPR_S2 18 /* s2 */ |
#define | MIPS_GPR_S3 19 /* s3 */ |
#define | MIPS_GPR_S4 20 /* s4 */ |
#define | MIPS_GPR_S5 21 /* s5 */ |
#define | MIPS_GPR_S6 22 /* s6 */ |
#define | MIPS_GPR_S7 23 /* s7 */ |
#define | MIPS_GPR_T8 24 /* t8 */ |
#define | MIPS_GPR_T9 25 /* t9 */ |
#define | MIPS_GPR_K0 26 /* k0 */ |
#define | MIPS_GPR_K1 27 /* k1 */ |
#define | MIPS_GPR_GP 28 /* gp */ |
#define | MIPS_GPR_SP 29 /* sp */ |
#define | MIPS_GPR_FP 30 /* fp */ |
#define | MIPS_GPR_RA 31 /* ra */ |
#define | N_HI6 64 |
#define | N_SPECIAL 64 |
#define | N_REGIMM 32 |
#define MIPS_FCSR_FCC0_SHIFT 23 |
Definition at line 48 of file MIPS_CPUComponent.h.
#define MIPS_FCSR_FCC1_SHIFT 25 |
Definition at line 49 of file MIPS_CPUComponent.h.
#define MIPS_FPU_FCCR 25 |
Definition at line 46 of file MIPS_CPUComponent.h.
#define MIPS_FPU_FCIR 0 |
Definition at line 45 of file MIPS_CPUComponent.h.
#define MIPS_FPU_FCSR 31 |
Definition at line 47 of file MIPS_CPUComponent.h.
#define MIPS_GPR_A0 4 /* a0 */ |
Definition at line 77 of file MIPS_CPUComponent.h.
#define MIPS_GPR_A1 5 /* a1 */ |
Definition at line 78 of file MIPS_CPUComponent.h.
#define MIPS_GPR_A2 6 /* a2 */ |
Definition at line 79 of file MIPS_CPUComponent.h.
#define MIPS_GPR_A3 7 /* a3 */ |
Definition at line 80 of file MIPS_CPUComponent.h.
#define MIPS_GPR_AT 1 /* at */ |
Definition at line 74 of file MIPS_CPUComponent.h.
#define MIPS_GPR_FP 30 /* fp */ |
Definition at line 103 of file MIPS_CPUComponent.h.
#define MIPS_GPR_GP 28 /* gp */ |
Definition at line 101 of file MIPS_CPUComponent.h.
#define MIPS_GPR_K0 26 /* k0 */ |
Definition at line 99 of file MIPS_CPUComponent.h.
#define MIPS_GPR_K1 27 /* k1 */ |
Definition at line 100 of file MIPS_CPUComponent.h.
#define MIPS_GPR_RA 31 /* ra */ |
Definition at line 104 of file MIPS_CPUComponent.h.
#define MIPS_GPR_S0 16 /* s0 */ |
Definition at line 89 of file MIPS_CPUComponent.h.
#define MIPS_GPR_S1 17 /* s1 */ |
Definition at line 90 of file MIPS_CPUComponent.h.
#define MIPS_GPR_S2 18 /* s2 */ |
Definition at line 91 of file MIPS_CPUComponent.h.
#define MIPS_GPR_S3 19 /* s3 */ |
Definition at line 92 of file MIPS_CPUComponent.h.
#define MIPS_GPR_S4 20 /* s4 */ |
Definition at line 93 of file MIPS_CPUComponent.h.
#define MIPS_GPR_S5 21 /* s5 */ |
Definition at line 94 of file MIPS_CPUComponent.h.
#define MIPS_GPR_S6 22 /* s6 */ |
Definition at line 95 of file MIPS_CPUComponent.h.
#define MIPS_GPR_S7 23 /* s7 */ |
Definition at line 96 of file MIPS_CPUComponent.h.
#define MIPS_GPR_SP 29 /* sp */ |
Definition at line 102 of file MIPS_CPUComponent.h.
#define MIPS_GPR_T0 8 /* t0 */ |
Definition at line 81 of file MIPS_CPUComponent.h.
#define MIPS_GPR_T1 9 /* t1 */ |
Definition at line 82 of file MIPS_CPUComponent.h.
#define MIPS_GPR_T2 10 /* t2 */ |
Definition at line 83 of file MIPS_CPUComponent.h.
#define MIPS_GPR_T3 11 /* t3 */ |
Definition at line 84 of file MIPS_CPUComponent.h.
#define MIPS_GPR_T4 12 /* t4 */ |
Definition at line 85 of file MIPS_CPUComponent.h.
#define MIPS_GPR_T5 13 /* t5 */ |
Definition at line 86 of file MIPS_CPUComponent.h.
#define MIPS_GPR_T6 14 /* t6 */ |
Definition at line 87 of file MIPS_CPUComponent.h.
#define MIPS_GPR_T7 15 /* t7 */ |
Definition at line 88 of file MIPS_CPUComponent.h.
#define MIPS_GPR_T8 24 /* t8 */ |
Definition at line 97 of file MIPS_CPUComponent.h.
#define MIPS_GPR_T9 25 /* t9 */ |
Definition at line 98 of file MIPS_CPUComponent.h.
#define MIPS_GPR_V0 2 /* v0 */ |
Definition at line 75 of file MIPS_CPUComponent.h.
#define MIPS_GPR_V1 3 /* v1 */ |
Definition at line 76 of file MIPS_CPUComponent.h.
#define MIPS_GPR_ZERO 0 /* zero */ |
Definition at line 73 of file MIPS_CPUComponent.h.
#define MIPS_INITIAL_PC ((int32_t) 0xbfc00000) |
Definition at line 39 of file MIPS_CPUComponent.h.
#define MIPS_INITIAL_STACK_POINTER ((int32_t) 0xa0008000 - 256) |
Definition at line 40 of file MIPS_CPUComponent.h.
#define MIPS_OLDABI_REGISTER_NAMES |
Definition at line 62 of file MIPS_CPUComponent.h.
#define MIPS_REGISTER_NAMES |
Definition at line 67 of file MIPS_CPUComponent.h.
#define N_HI6 64 |
Definition at line 106 of file MIPS_CPUComponent.h.
#define N_MIPS_COPROCS 4 |
Definition at line 51 of file MIPS_CPUComponent.h.
#define N_MIPS_FCRS 32 |
Definition at line 44 of file MIPS_CPUComponent.h.
#define N_MIPS_FPRS 32 /* Floating point registers */ |
Definition at line 54 of file MIPS_CPUComponent.h.
#define N_MIPS_GPRS 32 /* General purpose registers */ |
Definition at line 53 of file MIPS_CPUComponent.h.
#define N_REGIMM 32 |
Definition at line 108 of file MIPS_CPUComponent.h.
#define N_SPECIAL 64 |
Definition at line 107 of file MIPS_CPUComponent.h.