#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include "cpu.h"
#include "device.h"
#include "devices.h"
#include "emul.h"
#include "interrupt.h"
#include "machine.h"
#include "memory.h"
#include "misc.h"
#include "net.h"
#include "thirdparty/mii.h"
#include "thirdparty/tulipreg.h"
Go to the source code of this file.
Classes | |
struct | dec21143_data |
Macros | |
#define | DEC21143_TICK_SHIFT 16 |
#define | N_REGS 32 |
#define | ROM_WIDTH 6 |
#define | MII_STATE_RESET 0 |
#define | MII_STATE_START_WAIT 1 |
#define | MII_STATE_READ_OP 2 |
#define | MII_STATE_READ_PHYADDR_REGADDR 3 |
#define | MII_STATE_A 4 |
#define | MII_STATE_D 5 |
#define | MII_STATE_IDLE 6 |
Functions | |
int | dec21143_rx (struct cpu *cpu, struct dec21143_data *d) |
int | dec21143_tx (struct cpu *cpu, struct dec21143_data *d) |
DEVICE_TICK (dec21143) | |
DEVICE_ACCESS (dec21143) | |
DEVINIT (dec21143) | |
#define DEC21143_TICK_SHIFT 16 |
Definition at line 73 of file dev_dec21143.cc.
#define MII_STATE_A 4 |
Definition at line 127 of file dev_dec21143.cc.
#define MII_STATE_D 5 |
Definition at line 128 of file dev_dec21143.cc.
#define MII_STATE_IDLE 6 |
Definition at line 129 of file dev_dec21143.cc.
#define MII_STATE_READ_OP 2 |
Definition at line 125 of file dev_dec21143.cc.
#define MII_STATE_READ_PHYADDR_REGADDR 3 |
Definition at line 126 of file dev_dec21143.cc.
#define MII_STATE_RESET 0 |
Definition at line 123 of file dev_dec21143.cc.
#define MII_STATE_START_WAIT 1 |
Definition at line 124 of file dev_dec21143.cc.
#define N_REGS 32 |
Definition at line 75 of file dev_dec21143.cc.
#define ROM_WIDTH 6 |
Definition at line 76 of file dev_dec21143.cc.
int dec21143_rx | ( | struct cpu * | cpu, |
struct dec21143_data * | d | ||
) |
Definition at line 139 of file dev_dec21143.cc.
References addr, CHECK_ALLOCATION, CSR_RXLIST, CSR_STATUS, dec21143_data::cur_rx_addr, dec21143_data::cur_rx_buf, dec21143_data::cur_rx_buf_len, dec21143_data::cur_rx_offset, debug, fatal(), cpu::mem, MEM_READ, MEM_WRITE, cpu::memory_rw, dec21143_data::net, net_ethernet_rx(), net_ethernet_rx_avail(), NO_EXCEPTIONS, PHYSICAL, dec21143_data::reg, STATUS_RI, STATUS_RS, STATUS_RU, TDCTL_CH, TDCTL_ER, TDCTL_SIZE1, TDCTL_SIZE2, TDCTL_SIZE2_SHIFT, TDSTAT_OWN, TDSTAT_Rx_FL, TDSTAT_Rx_FS, TDSTAT_Rx_LS, and TDSTAT_Rx_TL.
Referenced by DEVICE_TICK().
int dec21143_tx | ( | struct cpu * | cpu, |
struct dec21143_data * | d | ||
) |
Definition at line 283 of file dev_dec21143.cc.
References addr, CHECK_ALLOCATION, CSR_STATUS, CSR_TXLIST, dec21143_data::cur_tx_addr, dec21143_data::cur_tx_buf, dec21143_data::cur_tx_buf_len, fatal(), cpu::mem, MEM_READ, MEM_WRITE, cpu::memory_rw, dec21143_data::net, net_ethernet_tx(), NO_EXCEPTIONS, PHYSICAL, dec21143_data::reg, STATUS_TI, STATUS_TS, STATUS_TU, TDCTL_CH, TDCTL_ER, TDCTL_SIZE1, TDCTL_SIZE2, TDCTL_SIZE2_SHIFT, TDCTL_Tx_FS, TDCTL_Tx_IC, TDCTL_Tx_LS, TDCTL_Tx_SET, TDSTAT_ES, TDSTAT_OWN, TDSTAT_Tx_EC, TDSTAT_Tx_LC, TDSTAT_Tx_LO, TDSTAT_Tx_NC, TDSTAT_Tx_TO, TDSTAT_Tx_UF, dec21143_data::tx_idling, and dec21143_data::tx_idling_threshold.
Referenced by DEVICE_TICK().
DEVICE_ACCESS | ( | dec21143 | ) |
Definition at line 814 of file dev_dec21143.cc.
References BUSMODE_SWR, CSR_BUSMODE, CSR_MISSED, CSR_STATUS, data, fatal(), MEM_READ, MEM_WRITE, memory_readmax64(), N_REGS, dec21143_data::pci_little_endian, and dec21143_data::reg.
DEVICE_TICK | ( | dec21143 | ) |
Definition at line 452 of file dev_dec21143.cc.
References CSR_INTEN, CSR_OPMODE, CSR_STATUS, dec21143_rx(), dec21143_tx(), INTERRUPT_ASSERT, INTERRUPT_DEASSERT, dec21143_data::irq, dec21143_data::irq_was_asserted, OPMODE_SR, OPMODE_ST, dec21143_data::reg, STATUS_AIS, and STATUS_NIS.
DEVINIT | ( | dec21143 | ) |
Definition at line 975 of file dev_dec21143.cc.
References CHECK_ALLOCATION, machine::emul, INTERRUPT_CONNECT, devinit::interrupt_path, dec21143_data::irq, dec21143_data::mac, devinit::machine, emul::net, dec21143_data::net, net_add_nic(), net_generate_unique_mac(), devinit::pci_little_endian, and dec21143_data::pci_little_endian.