mk48txxreg.h Source File

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mk48txxreg.h
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1 /* $NetBSD: mk48txxreg.h,v 1.7 2003/11/01 22:41:42 tsutsui Exp $ */
2 
3 #ifndef MK48TXXREG_H
4 #define MK48TXXREG_H
5 
6 /*-
7  * Copyright (c) 2000 The NetBSD Foundation, Inc.
8  * All rights reserved.
9  *
10  * This code is derived from software contributed to The NetBSD Foundation
11  * by Paul Kranenburg.
12  *
13  * Redistribution and use in source and binary forms, with or without
14  * modification, are permitted provided that the following conditions
15  * are met:
16  * 1. Redistributions of source code must retain the above copyright
17  * notice, this list of conditions and the following disclaimer.
18  * 2. Redistributions in binary form must reproduce the above copyright
19  * notice, this list of conditions and the following disclaimer in the
20  * documentation and/or other materials provided with the distribution.
21  * 3. All advertising materials mentioning features or use of this software
22  * must display the following acknowledgement:
23  * This product includes software developed by the NetBSD
24  * Foundation, Inc. and its contributors.
25  * 4. Neither the name of The NetBSD Foundation nor the names of its
26  * contributors may be used to endorse or promote products derived
27  * from this software without specific prior written permission.
28  *
29  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
30  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
31  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
32  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
33  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
34  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
35  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
36  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
37  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
38  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
39  * POSSIBILITY OF SUCH DAMAGE.
40  */
41 
42 /*
43  * Mostek MK48Txx clocks.
44  *
45  * The MK48T02 has 2KB of non-volatile memory. The time-of-day clock
46  * registers start at offset 0x7f8.
47  *
48  * The MK48T08 and MK48T18 have 8KB of non-volatile memory
49  *
50  * The MK48T59 also has 8KB of non-volatile memory but in addition it
51  * has a battery low detection bit and a power supply wakeup alarm for
52  * power management. It's at offset 0x1ff0 in the NVRAM.
53  */
54 
55 /*
56  * Mostek MK48TXX register definitions
57  */
58 
59 /*
60  * The first bank of eight registers at offset (nvramsz - 16) is
61  * available only on more recent (which??) MK48Txx models.
62  */
63 #define MK48TXX_IFLAGS 0 /* flags */
64 /* 1 unused on MK48T59 */
65 #define MK48TXX_IASEC 2 /* alarm seconds (0..59; BCD) */
66 #define MK48TXX_IAMIN 3 /* alarm minutes (0..59; BCD) */
67 #define MK48TXX_IAHOUR 4 /* alarm hour (0..23; BCD) */
68 #define MK48TXX_IADAY 5 /* alarm day (1..31; BCD) */
69 #define MK48TXX_IINTR 6 /* interrupts */
70 #define MK48TXX_IWDOG 7 /* watchdog */
71 #define MK48TXX_ICSR 8 /* control register */
72 #define MK48TXX_ISEC 9 /* seconds (0..59; BCD) */
73 #define MK48TXX_IMIN 10 /* minutes (0..59; BCD) */
74 #define MK48TXX_IHOUR 11 /* hour (0..23; BCD) */
75 #define MK48TXX_IWDAY 12 /* weekday (1..7) */
76 #define MK48TXX_IDAY 13 /* day in month (1..31; BCD) */
77 #define MK48TXX_IMON 14 /* month (1..12; BCD) */
78 #define MK48TXX_IYEAR 15 /* year (0..99; BCD) */
79 
80 /* Bits in the flags register */
81 #define MK48TXX_FLAGS_WDF 0x80 /* watchdog flag */
82 #define MK48TXX_FLAGS_ALARM 0x40 /* alarm flag */
83 #define MK48TXX_FLAGS_BATTLOW 0x10 /* battery low */
84 
85 /* Bits in the interrupt register */
86 #define MK48TXX_INTR_AFE 0x80 /* alarm flag enable */
87 #define MK48TXX_INTR_ABE 0x20 /* alarm in battery backup enable */
88 
89 /* Bits in the watchdog register */
90 #define MK48TXX_WDOG_WDS 0x80 /* watchdog steering */
91 #define MK48TXX_WDOG_BMB_MASK 0x7c /* watchdog multiplier bits */
92 #define MK48TXX_WDOG_BMB_SHIFT 2
93 #define MK48TXX_WDOG_RES_MASK 0x03 /* watchdog resolution bits */
94 #define MK48TXX_WDOG_RES_1_16S 0x00 /* 1/16 seconds */
95 #define MK48TXX_WDOG_RES_1_4S 0x01 /* 1/4 seconds */
96 #define MK48TXX_WDOG_RES_1S 0x02 /* 1 second */
97 #define MK48TXX_WDOG_RES_4S 0x03 /* 4 seconds */
98 
99 /* Bits in the control register */
100 #define MK48TXX_CSR_WRITE 0x80 /* want to write */
101 #define MK48TXX_CSR_READ 0x40 /* want to read (freeze clock) */
102 
103 /* Bit in the weekday register */
104 #define MK48TXX_WDAY_FT 0x40 /* freq test: toggle sec[0] at 512Hz */
105  /* next two are on MK48T59 only */
106 #define MK48TXX_WDAY_CEB 0x20 /* century enable */
107 #define MK48TXX_WDAY_CB 0x10 /* century bit */
108 
109 /* Bit in the seconds register */
110 #define MK48TXX_SEC_STOP 0x80 /* stop the oscillator */
111 
112 #define MK48T02_CLKSZ 2048
113 #define MK48T02_CLKOFF 0x7f0
114 
115 #define MK48T08_CLKSZ 8192
116 #define MK48T08_CLKOFF 0x1ff0
117 
118 #define MK48T18_CLKSZ 8192
119 #define MK48T18_CLKOFF 0x1ff0
120 
121 #define MK48T59_CLKSZ 8192
122 #define MK48T59_CLKOFF 0x1ff0
123 
124 #endif /* MK48TXXREG_H */

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