tmp_arm_loadstore_p1_u1_w1.cc Source File
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cpus
tmp_arm_loadstore_p1_u1_w1.cc
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/* AUTOMATICALLY GENERATED! Do not edit. */
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4
#include <stdio.h>
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#include <stdlib.h>
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#include "
cpu.h
"
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#include "
machine.h
"
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#include "
memory.h
"
9
#include "
misc.h
"
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#define DYNTRANS_PC_TO_POINTERS arm_pc_to_pointers
11
#include "
quick_pc_to_pointers.h
"
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#define reg(x) (*((uint32_t *)(x)))
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extern
void
arm_instr_nop
(
struct
cpu
*,
struct
arm_instr_call *);
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extern
void
arm_instr_invalid
(
struct
cpu
*,
struct
arm_instr_call *);
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extern
void
arm_pc_to_pointers
(
struct
cpu
*);
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#define A__NAME__general arm_instr_store_w1_word_u1_p1_imm__general
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#define A__NAME arm_instr_store_w1_word_u1_p1_imm
18
#define A__NAME__eq arm_instr_store_w1_word_u1_p1_imm__eq
19
#define A__NAME__ne arm_instr_store_w1_word_u1_p1_imm__ne
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#define A__NAME__cs arm_instr_store_w1_word_u1_p1_imm__cs
21
#define A__NAME__cc arm_instr_store_w1_word_u1_p1_imm__cc
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#define A__NAME__mi arm_instr_store_w1_word_u1_p1_imm__mi
23
#define A__NAME__pl arm_instr_store_w1_word_u1_p1_imm__pl
24
#define A__NAME__vs arm_instr_store_w1_word_u1_p1_imm__vs
25
#define A__NAME__vc arm_instr_store_w1_word_u1_p1_imm__vc
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#define A__NAME__hi arm_instr_store_w1_word_u1_p1_imm__hi
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#define A__NAME__ls arm_instr_store_w1_word_u1_p1_imm__ls
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#define A__NAME__ge arm_instr_store_w1_word_u1_p1_imm__ge
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#define A__NAME__lt arm_instr_store_w1_word_u1_p1_imm__lt
30
#define A__NAME__gt arm_instr_store_w1_word_u1_p1_imm__gt
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#define A__NAME__le arm_instr_store_w1_word_u1_p1_imm__le
32
#define A__NAME_PC arm_instr_store_w1_word_u1_p1_imm_pc
33
#define A__NAME_PC__eq arm_instr_store_w1_word_u1_p1_imm_pc__eq
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#define A__NAME_PC__ne arm_instr_store_w1_word_u1_p1_imm_pc__ne
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#define A__NAME_PC__cs arm_instr_store_w1_word_u1_p1_imm_pc__cs
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#define A__NAME_PC__cc arm_instr_store_w1_word_u1_p1_imm_pc__cc
37
#define A__NAME_PC__mi arm_instr_store_w1_word_u1_p1_imm_pc__mi
38
#define A__NAME_PC__pl arm_instr_store_w1_word_u1_p1_imm_pc__pl
39
#define A__NAME_PC__vs arm_instr_store_w1_word_u1_p1_imm_pc__vs
40
#define A__NAME_PC__vc arm_instr_store_w1_word_u1_p1_imm_pc__vc
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#define A__NAME_PC__hi arm_instr_store_w1_word_u1_p1_imm_pc__hi
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#define A__NAME_PC__ls arm_instr_store_w1_word_u1_p1_imm_pc__ls
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#define A__NAME_PC__ge arm_instr_store_w1_word_u1_p1_imm_pc__ge
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#define A__NAME_PC__lt arm_instr_store_w1_word_u1_p1_imm_pc__lt
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#define A__NAME_PC__gt arm_instr_store_w1_word_u1_p1_imm_pc__gt
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#define A__NAME_PC__le arm_instr_store_w1_word_u1_p1_imm_pc__le
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#define A__W
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#define A__U
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#define A__P
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#include "
cpu_arm_instr_loadstore.cc
"
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#undef A__W
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#undef A__U
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#undef A__P
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#undef A__NAME__eq
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#undef A__NAME__ne
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#undef A__NAME__cs
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#undef A__NAME__cc
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#undef A__NAME__mi
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#undef A__NAME__pl
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#undef A__NAME__vs
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#undef A__NAME__vc
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#undef A__NAME__hi
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#undef A__NAME__ls
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#undef A__NAME__ge
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#undef A__NAME__lt
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#undef A__NAME__gt
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#undef A__NAME__le
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#undef A__NAME_PC__eq
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#undef A__NAME_PC__ne
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#undef A__NAME_PC__cs
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#undef A__NAME_PC__cc
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#undef A__NAME_PC__mi
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#undef A__NAME_PC__pl
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#undef A__NAME_PC__vs
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#undef A__NAME_PC__vc
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#undef A__NAME_PC__hi
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#undef A__NAME_PC__ls
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#undef A__NAME_PC__ge
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#undef A__NAME_PC__lt
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#undef A__NAME_PC__gt
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#undef A__NAME_PC__le
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#undef A__NAME__general
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#undef A__NAME_PC
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#undef A__NAME
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#define A__NAME__general arm_instr_load_w1_word_u1_p1_imm__general
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#define A__NAME arm_instr_load_w1_word_u1_p1_imm
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#define A__NAME__eq arm_instr_load_w1_word_u1_p1_imm__eq
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#define A__NAME__ne arm_instr_load_w1_word_u1_p1_imm__ne
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#define A__NAME__cs arm_instr_load_w1_word_u1_p1_imm__cs
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#define A__NAME__cc arm_instr_load_w1_word_u1_p1_imm__cc
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#define A__NAME__mi arm_instr_load_w1_word_u1_p1_imm__mi
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#define A__NAME__pl arm_instr_load_w1_word_u1_p1_imm__pl
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#define A__NAME__vs arm_instr_load_w1_word_u1_p1_imm__vs
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#define A__NAME__vc arm_instr_load_w1_word_u1_p1_imm__vc
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#define A__NAME__hi arm_instr_load_w1_word_u1_p1_imm__hi
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#define A__NAME__ls arm_instr_load_w1_word_u1_p1_imm__ls
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#define A__NAME__ge arm_instr_load_w1_word_u1_p1_imm__ge
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#define A__NAME__lt arm_instr_load_w1_word_u1_p1_imm__lt
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#define A__NAME__gt arm_instr_load_w1_word_u1_p1_imm__gt
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#define A__NAME__le arm_instr_load_w1_word_u1_p1_imm__le
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#define A__NAME_PC arm_instr_load_w1_word_u1_p1_imm_pc
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#define A__NAME_PC__eq arm_instr_load_w1_word_u1_p1_imm_pc__eq
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#define A__NAME_PC__ne arm_instr_load_w1_word_u1_p1_imm_pc__ne
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#define A__NAME_PC__cs arm_instr_load_w1_word_u1_p1_imm_pc__cs
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#define A__NAME_PC__cc arm_instr_load_w1_word_u1_p1_imm_pc__cc
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#define A__NAME_PC__mi arm_instr_load_w1_word_u1_p1_imm_pc__mi
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#define A__NAME_PC__pl arm_instr_load_w1_word_u1_p1_imm_pc__pl
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#define A__NAME_PC__vs arm_instr_load_w1_word_u1_p1_imm_pc__vs
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#define A__NAME_PC__vc arm_instr_load_w1_word_u1_p1_imm_pc__vc
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#define A__NAME_PC__hi arm_instr_load_w1_word_u1_p1_imm_pc__hi
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#define A__NAME_PC__ls arm_instr_load_w1_word_u1_p1_imm_pc__ls
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#define A__NAME_PC__ge arm_instr_load_w1_word_u1_p1_imm_pc__ge
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#define A__NAME_PC__lt arm_instr_load_w1_word_u1_p1_imm_pc__lt
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#define A__NAME_PC__gt arm_instr_load_w1_word_u1_p1_imm_pc__gt
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#define A__NAME_PC__le arm_instr_load_w1_word_u1_p1_imm_pc__le
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#define A__L
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#define A__W
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#define A__U
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#define A__P
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#include "
cpu_arm_instr_loadstore.cc
"
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#undef A__L
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#undef A__W
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#undef A__U
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#undef A__P
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#undef A__NAME__eq
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#undef A__NAME__ne
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#undef A__NAME__cs
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#undef A__NAME__cc
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#undef A__NAME__mi
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#undef A__NAME__pl
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#undef A__NAME__vs
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#undef A__NAME__vc
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#undef A__NAME__hi
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#undef A__NAME__ls
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#undef A__NAME__ge
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#undef A__NAME__lt
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#undef A__NAME__gt
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#undef A__NAME__le
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#undef A__NAME_PC__eq
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#undef A__NAME_PC__ne
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#undef A__NAME_PC__cs
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#undef A__NAME_PC__cc
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#undef A__NAME_PC__mi
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#undef A__NAME_PC__pl
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#undef A__NAME_PC__vs
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#undef A__NAME_PC__vc
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#undef A__NAME_PC__hi
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#undef A__NAME_PC__ls
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#undef A__NAME_PC__ge
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#undef A__NAME_PC__lt
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#undef A__NAME_PC__gt
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#undef A__NAME_PC__le
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#undef A__NAME__general
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#undef A__NAME_PC
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#undef A__NAME
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#define A__NAME__general arm_instr_store_w1_byte_u1_p1_imm__general
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#define A__NAME arm_instr_store_w1_byte_u1_p1_imm
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#define A__NAME__eq arm_instr_store_w1_byte_u1_p1_imm__eq
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#define A__NAME__ne arm_instr_store_w1_byte_u1_p1_imm__ne
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#define A__NAME__cs arm_instr_store_w1_byte_u1_p1_imm__cs
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#define A__NAME__cc arm_instr_store_w1_byte_u1_p1_imm__cc
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#define A__NAME__mi arm_instr_store_w1_byte_u1_p1_imm__mi
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#define A__NAME__pl arm_instr_store_w1_byte_u1_p1_imm__pl
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#define A__NAME__vs arm_instr_store_w1_byte_u1_p1_imm__vs
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#define A__NAME__vc arm_instr_store_w1_byte_u1_p1_imm__vc
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#define A__NAME__hi arm_instr_store_w1_byte_u1_p1_imm__hi
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#define A__NAME__ls arm_instr_store_w1_byte_u1_p1_imm__ls
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#define A__NAME__ge arm_instr_store_w1_byte_u1_p1_imm__ge
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#define A__NAME__lt arm_instr_store_w1_byte_u1_p1_imm__lt
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#define A__NAME__gt arm_instr_store_w1_byte_u1_p1_imm__gt
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#define A__NAME__le arm_instr_store_w1_byte_u1_p1_imm__le
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#define A__NAME_PC arm_instr_store_w1_byte_u1_p1_imm_pc
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#define A__NAME_PC__eq arm_instr_store_w1_byte_u1_p1_imm_pc__eq
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#define A__NAME_PC__ne arm_instr_store_w1_byte_u1_p1_imm_pc__ne
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#define A__NAME_PC__cs arm_instr_store_w1_byte_u1_p1_imm_pc__cs
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#define A__NAME_PC__cc arm_instr_store_w1_byte_u1_p1_imm_pc__cc
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#define A__NAME_PC__mi arm_instr_store_w1_byte_u1_p1_imm_pc__mi
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#define A__NAME_PC__pl arm_instr_store_w1_byte_u1_p1_imm_pc__pl
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#define A__NAME_PC__vs arm_instr_store_w1_byte_u1_p1_imm_pc__vs
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#define A__NAME_PC__vc arm_instr_store_w1_byte_u1_p1_imm_pc__vc
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#define A__NAME_PC__hi arm_instr_store_w1_byte_u1_p1_imm_pc__hi
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#define A__NAME_PC__ls arm_instr_store_w1_byte_u1_p1_imm_pc__ls
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#define A__NAME_PC__ge arm_instr_store_w1_byte_u1_p1_imm_pc__ge
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#define A__NAME_PC__lt arm_instr_store_w1_byte_u1_p1_imm_pc__lt
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#define A__NAME_PC__gt arm_instr_store_w1_byte_u1_p1_imm_pc__gt
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#define A__NAME_PC__le arm_instr_store_w1_byte_u1_p1_imm_pc__le
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#define A__W
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#define A__B
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#define A__U
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#define A__P
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#include "
cpu_arm_instr_loadstore.cc
"
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#undef A__W
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#undef A__B
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#undef A__U
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#undef A__P
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#undef A__NAME__eq
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#undef A__NAME__ne
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#undef A__NAME__cs
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#undef A__NAME__cc
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#undef A__NAME__mi
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#undef A__NAME__pl
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#undef A__NAME__vs
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#undef A__NAME__vc
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#undef A__NAME__hi
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#undef A__NAME__ls
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#undef A__NAME__ge
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#undef A__NAME__lt
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#undef A__NAME__gt
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#undef A__NAME__le
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#undef A__NAME_PC__eq
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#undef A__NAME_PC__ne
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#undef A__NAME_PC__cs
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#undef A__NAME_PC__cc
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#undef A__NAME_PC__mi
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#undef A__NAME_PC__pl
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#undef A__NAME_PC__vs
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#undef A__NAME_PC__vc
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#undef A__NAME_PC__hi
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#undef A__NAME_PC__ls
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#undef A__NAME_PC__ge
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#undef A__NAME_PC__lt
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#undef A__NAME_PC__gt
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#undef A__NAME_PC__le
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#undef A__NAME__general
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#undef A__NAME_PC
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#undef A__NAME
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#define A__NAME__general arm_instr_load_w1_byte_u1_p1_imm__general
228
#define A__NAME arm_instr_load_w1_byte_u1_p1_imm
229
#define A__NAME__eq arm_instr_load_w1_byte_u1_p1_imm__eq
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#define A__NAME__ne arm_instr_load_w1_byte_u1_p1_imm__ne
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#define A__NAME__cs arm_instr_load_w1_byte_u1_p1_imm__cs
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#define A__NAME__cc arm_instr_load_w1_byte_u1_p1_imm__cc
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#define A__NAME__mi arm_instr_load_w1_byte_u1_p1_imm__mi
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#define A__NAME__pl arm_instr_load_w1_byte_u1_p1_imm__pl
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#define A__NAME__vs arm_instr_load_w1_byte_u1_p1_imm__vs
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#define A__NAME__vc arm_instr_load_w1_byte_u1_p1_imm__vc
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#define A__NAME__hi arm_instr_load_w1_byte_u1_p1_imm__hi
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#define A__NAME__ls arm_instr_load_w1_byte_u1_p1_imm__ls
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#define A__NAME__ge arm_instr_load_w1_byte_u1_p1_imm__ge
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#define A__NAME__lt arm_instr_load_w1_byte_u1_p1_imm__lt
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#define A__NAME__gt arm_instr_load_w1_byte_u1_p1_imm__gt
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#define A__NAME__le arm_instr_load_w1_byte_u1_p1_imm__le
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#define A__NAME_PC arm_instr_load_w1_byte_u1_p1_imm_pc
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#define A__NAME_PC__eq arm_instr_load_w1_byte_u1_p1_imm_pc__eq
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#define A__NAME_PC__ne arm_instr_load_w1_byte_u1_p1_imm_pc__ne
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#define A__NAME_PC__cs arm_instr_load_w1_byte_u1_p1_imm_pc__cs
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#define A__NAME_PC__cc arm_instr_load_w1_byte_u1_p1_imm_pc__cc
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#define A__NAME_PC__mi arm_instr_load_w1_byte_u1_p1_imm_pc__mi
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#define A__NAME_PC__pl arm_instr_load_w1_byte_u1_p1_imm_pc__pl
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#define A__NAME_PC__vs arm_instr_load_w1_byte_u1_p1_imm_pc__vs
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#define A__NAME_PC__vc arm_instr_load_w1_byte_u1_p1_imm_pc__vc
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#define A__NAME_PC__hi arm_instr_load_w1_byte_u1_p1_imm_pc__hi
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#define A__NAME_PC__ls arm_instr_load_w1_byte_u1_p1_imm_pc__ls
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#define A__NAME_PC__ge arm_instr_load_w1_byte_u1_p1_imm_pc__ge
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#define A__NAME_PC__lt arm_instr_load_w1_byte_u1_p1_imm_pc__lt
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#define A__NAME_PC__gt arm_instr_load_w1_byte_u1_p1_imm_pc__gt
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#define A__NAME_PC__le arm_instr_load_w1_byte_u1_p1_imm_pc__le
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#define A__L
259
#define A__W
260
#define A__B
261
#define A__U
262
#define A__P
263
#include "
cpu_arm_instr_loadstore.cc
"
264
#undef A__L
265
#undef A__W
266
#undef A__B
267
#undef A__U
268
#undef A__P
269
#undef A__NAME__eq
270
#undef A__NAME__ne
271
#undef A__NAME__cs
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#undef A__NAME__cc
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#undef A__NAME__mi
274
#undef A__NAME__pl
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#undef A__NAME__vs
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#undef A__NAME__vc
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#undef A__NAME__hi
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#undef A__NAME__ls
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#undef A__NAME__ge
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#undef A__NAME__lt
281
#undef A__NAME__gt
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#undef A__NAME__le
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#undef A__NAME_PC__eq
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#undef A__NAME_PC__ne
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#undef A__NAME_PC__cs
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#undef A__NAME_PC__cc
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#undef A__NAME_PC__mi
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#undef A__NAME_PC__pl
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#undef A__NAME_PC__vs
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#undef A__NAME_PC__vc
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#undef A__NAME_PC__hi
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#undef A__NAME_PC__ls
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#undef A__NAME_PC__ge
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#undef A__NAME_PC__lt
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#undef A__NAME_PC__gt
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#undef A__NAME_PC__le
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#undef A__NAME__general
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#undef A__NAME_PC
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#undef A__NAME
300
#define A__NAME__general arm_instr_store_w1_word_u1_p1_reg__general
301
#define A__NAME arm_instr_store_w1_word_u1_p1_reg
302
#define A__NAME__eq arm_instr_store_w1_word_u1_p1_reg__eq
303
#define A__NAME__ne arm_instr_store_w1_word_u1_p1_reg__ne
304
#define A__NAME__cs arm_instr_store_w1_word_u1_p1_reg__cs
305
#define A__NAME__cc arm_instr_store_w1_word_u1_p1_reg__cc
306
#define A__NAME__mi arm_instr_store_w1_word_u1_p1_reg__mi
307
#define A__NAME__pl arm_instr_store_w1_word_u1_p1_reg__pl
308
#define A__NAME__vs arm_instr_store_w1_word_u1_p1_reg__vs
309
#define A__NAME__vc arm_instr_store_w1_word_u1_p1_reg__vc
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#define A__NAME__hi arm_instr_store_w1_word_u1_p1_reg__hi
311
#define A__NAME__ls arm_instr_store_w1_word_u1_p1_reg__ls
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#define A__NAME__ge arm_instr_store_w1_word_u1_p1_reg__ge
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#define A__NAME__lt arm_instr_store_w1_word_u1_p1_reg__lt
314
#define A__NAME__gt arm_instr_store_w1_word_u1_p1_reg__gt
315
#define A__NAME__le arm_instr_store_w1_word_u1_p1_reg__le
316
#define A__NAME_PC arm_instr_store_w1_word_u1_p1_reg_pc
317
#define A__NAME_PC__eq arm_instr_store_w1_word_u1_p1_reg_pc__eq
318
#define A__NAME_PC__ne arm_instr_store_w1_word_u1_p1_reg_pc__ne
319
#define A__NAME_PC__cs arm_instr_store_w1_word_u1_p1_reg_pc__cs
320
#define A__NAME_PC__cc arm_instr_store_w1_word_u1_p1_reg_pc__cc
321
#define A__NAME_PC__mi arm_instr_store_w1_word_u1_p1_reg_pc__mi
322
#define A__NAME_PC__pl arm_instr_store_w1_word_u1_p1_reg_pc__pl
323
#define A__NAME_PC__vs arm_instr_store_w1_word_u1_p1_reg_pc__vs
324
#define A__NAME_PC__vc arm_instr_store_w1_word_u1_p1_reg_pc__vc
325
#define A__NAME_PC__hi arm_instr_store_w1_word_u1_p1_reg_pc__hi
326
#define A__NAME_PC__ls arm_instr_store_w1_word_u1_p1_reg_pc__ls
327
#define A__NAME_PC__ge arm_instr_store_w1_word_u1_p1_reg_pc__ge
328
#define A__NAME_PC__lt arm_instr_store_w1_word_u1_p1_reg_pc__lt
329
#define A__NAME_PC__gt arm_instr_store_w1_word_u1_p1_reg_pc__gt
330
#define A__NAME_PC__le arm_instr_store_w1_word_u1_p1_reg_pc__le
331
#define A__W
332
#define A__U
333
#define A__P
334
#define A__REG
335
#include "
cpu_arm_instr_loadstore.cc
"
336
#undef A__W
337
#undef A__U
338
#undef A__P
339
#undef A__REG
340
#undef A__NAME__eq
341
#undef A__NAME__ne
342
#undef A__NAME__cs
343
#undef A__NAME__cc
344
#undef A__NAME__mi
345
#undef A__NAME__pl
346
#undef A__NAME__vs
347
#undef A__NAME__vc
348
#undef A__NAME__hi
349
#undef A__NAME__ls
350
#undef A__NAME__ge
351
#undef A__NAME__lt
352
#undef A__NAME__gt
353
#undef A__NAME__le
354
#undef A__NAME_PC__eq
355
#undef A__NAME_PC__ne
356
#undef A__NAME_PC__cs
357
#undef A__NAME_PC__cc
358
#undef A__NAME_PC__mi
359
#undef A__NAME_PC__pl
360
#undef A__NAME_PC__vs
361
#undef A__NAME_PC__vc
362
#undef A__NAME_PC__hi
363
#undef A__NAME_PC__ls
364
#undef A__NAME_PC__ge
365
#undef A__NAME_PC__lt
366
#undef A__NAME_PC__gt
367
#undef A__NAME_PC__le
368
#undef A__NAME__general
369
#undef A__NAME_PC
370
#undef A__NAME
371
#define A__NAME__general arm_instr_load_w1_word_u1_p1_reg__general
372
#define A__NAME arm_instr_load_w1_word_u1_p1_reg
373
#define A__NAME__eq arm_instr_load_w1_word_u1_p1_reg__eq
374
#define A__NAME__ne arm_instr_load_w1_word_u1_p1_reg__ne
375
#define A__NAME__cs arm_instr_load_w1_word_u1_p1_reg__cs
376
#define A__NAME__cc arm_instr_load_w1_word_u1_p1_reg__cc
377
#define A__NAME__mi arm_instr_load_w1_word_u1_p1_reg__mi
378
#define A__NAME__pl arm_instr_load_w1_word_u1_p1_reg__pl
379
#define A__NAME__vs arm_instr_load_w1_word_u1_p1_reg__vs
380
#define A__NAME__vc arm_instr_load_w1_word_u1_p1_reg__vc
381
#define A__NAME__hi arm_instr_load_w1_word_u1_p1_reg__hi
382
#define A__NAME__ls arm_instr_load_w1_word_u1_p1_reg__ls
383
#define A__NAME__ge arm_instr_load_w1_word_u1_p1_reg__ge
384
#define A__NAME__lt arm_instr_load_w1_word_u1_p1_reg__lt
385
#define A__NAME__gt arm_instr_load_w1_word_u1_p1_reg__gt
386
#define A__NAME__le arm_instr_load_w1_word_u1_p1_reg__le
387
#define A__NAME_PC arm_instr_load_w1_word_u1_p1_reg_pc
388
#define A__NAME_PC__eq arm_instr_load_w1_word_u1_p1_reg_pc__eq
389
#define A__NAME_PC__ne arm_instr_load_w1_word_u1_p1_reg_pc__ne
390
#define A__NAME_PC__cs arm_instr_load_w1_word_u1_p1_reg_pc__cs
391
#define A__NAME_PC__cc arm_instr_load_w1_word_u1_p1_reg_pc__cc
392
#define A__NAME_PC__mi arm_instr_load_w1_word_u1_p1_reg_pc__mi
393
#define A__NAME_PC__pl arm_instr_load_w1_word_u1_p1_reg_pc__pl
394
#define A__NAME_PC__vs arm_instr_load_w1_word_u1_p1_reg_pc__vs
395
#define A__NAME_PC__vc arm_instr_load_w1_word_u1_p1_reg_pc__vc
396
#define A__NAME_PC__hi arm_instr_load_w1_word_u1_p1_reg_pc__hi
397
#define A__NAME_PC__ls arm_instr_load_w1_word_u1_p1_reg_pc__ls
398
#define A__NAME_PC__ge arm_instr_load_w1_word_u1_p1_reg_pc__ge
399
#define A__NAME_PC__lt arm_instr_load_w1_word_u1_p1_reg_pc__lt
400
#define A__NAME_PC__gt arm_instr_load_w1_word_u1_p1_reg_pc__gt
401
#define A__NAME_PC__le arm_instr_load_w1_word_u1_p1_reg_pc__le
402
#define A__L
403
#define A__W
404
#define A__U
405
#define A__P
406
#define A__REG
407
#include "
cpu_arm_instr_loadstore.cc
"
408
#undef A__L
409
#undef A__W
410
#undef A__U
411
#undef A__P
412
#undef A__REG
413
#undef A__NAME__eq
414
#undef A__NAME__ne
415
#undef A__NAME__cs
416
#undef A__NAME__cc
417
#undef A__NAME__mi
418
#undef A__NAME__pl
419
#undef A__NAME__vs
420
#undef A__NAME__vc
421
#undef A__NAME__hi
422
#undef A__NAME__ls
423
#undef A__NAME__ge
424
#undef A__NAME__lt
425
#undef A__NAME__gt
426
#undef A__NAME__le
427
#undef A__NAME_PC__eq
428
#undef A__NAME_PC__ne
429
#undef A__NAME_PC__cs
430
#undef A__NAME_PC__cc
431
#undef A__NAME_PC__mi
432
#undef A__NAME_PC__pl
433
#undef A__NAME_PC__vs
434
#undef A__NAME_PC__vc
435
#undef A__NAME_PC__hi
436
#undef A__NAME_PC__ls
437
#undef A__NAME_PC__ge
438
#undef A__NAME_PC__lt
439
#undef A__NAME_PC__gt
440
#undef A__NAME_PC__le
441
#undef A__NAME__general
442
#undef A__NAME_PC
443
#undef A__NAME
444
#define A__NAME__general arm_instr_store_w1_byte_u1_p1_reg__general
445
#define A__NAME arm_instr_store_w1_byte_u1_p1_reg
446
#define A__NAME__eq arm_instr_store_w1_byte_u1_p1_reg__eq
447
#define A__NAME__ne arm_instr_store_w1_byte_u1_p1_reg__ne
448
#define A__NAME__cs arm_instr_store_w1_byte_u1_p1_reg__cs
449
#define A__NAME__cc arm_instr_store_w1_byte_u1_p1_reg__cc
450
#define A__NAME__mi arm_instr_store_w1_byte_u1_p1_reg__mi
451
#define A__NAME__pl arm_instr_store_w1_byte_u1_p1_reg__pl
452
#define A__NAME__vs arm_instr_store_w1_byte_u1_p1_reg__vs
453
#define A__NAME__vc arm_instr_store_w1_byte_u1_p1_reg__vc
454
#define A__NAME__hi arm_instr_store_w1_byte_u1_p1_reg__hi
455
#define A__NAME__ls arm_instr_store_w1_byte_u1_p1_reg__ls
456
#define A__NAME__ge arm_instr_store_w1_byte_u1_p1_reg__ge
457
#define A__NAME__lt arm_instr_store_w1_byte_u1_p1_reg__lt
458
#define A__NAME__gt arm_instr_store_w1_byte_u1_p1_reg__gt
459
#define A__NAME__le arm_instr_store_w1_byte_u1_p1_reg__le
460
#define A__NAME_PC arm_instr_store_w1_byte_u1_p1_reg_pc
461
#define A__NAME_PC__eq arm_instr_store_w1_byte_u1_p1_reg_pc__eq
462
#define A__NAME_PC__ne arm_instr_store_w1_byte_u1_p1_reg_pc__ne
463
#define A__NAME_PC__cs arm_instr_store_w1_byte_u1_p1_reg_pc__cs
464
#define A__NAME_PC__cc arm_instr_store_w1_byte_u1_p1_reg_pc__cc
465
#define A__NAME_PC__mi arm_instr_store_w1_byte_u1_p1_reg_pc__mi
466
#define A__NAME_PC__pl arm_instr_store_w1_byte_u1_p1_reg_pc__pl
467
#define A__NAME_PC__vs arm_instr_store_w1_byte_u1_p1_reg_pc__vs
468
#define A__NAME_PC__vc arm_instr_store_w1_byte_u1_p1_reg_pc__vc
469
#define A__NAME_PC__hi arm_instr_store_w1_byte_u1_p1_reg_pc__hi
470
#define A__NAME_PC__ls arm_instr_store_w1_byte_u1_p1_reg_pc__ls
471
#define A__NAME_PC__ge arm_instr_store_w1_byte_u1_p1_reg_pc__ge
472
#define A__NAME_PC__lt arm_instr_store_w1_byte_u1_p1_reg_pc__lt
473
#define A__NAME_PC__gt arm_instr_store_w1_byte_u1_p1_reg_pc__gt
474
#define A__NAME_PC__le arm_instr_store_w1_byte_u1_p1_reg_pc__le
475
#define A__W
476
#define A__B
477
#define A__U
478
#define A__P
479
#define A__REG
480
#include "
cpu_arm_instr_loadstore.cc
"
481
#undef A__W
482
#undef A__B
483
#undef A__U
484
#undef A__P
485
#undef A__REG
486
#undef A__NAME__eq
487
#undef A__NAME__ne
488
#undef A__NAME__cs
489
#undef A__NAME__cc
490
#undef A__NAME__mi
491
#undef A__NAME__pl
492
#undef A__NAME__vs
493
#undef A__NAME__vc
494
#undef A__NAME__hi
495
#undef A__NAME__ls
496
#undef A__NAME__ge
497
#undef A__NAME__lt
498
#undef A__NAME__gt
499
#undef A__NAME__le
500
#undef A__NAME_PC__eq
501
#undef A__NAME_PC__ne
502
#undef A__NAME_PC__cs
503
#undef A__NAME_PC__cc
504
#undef A__NAME_PC__mi
505
#undef A__NAME_PC__pl
506
#undef A__NAME_PC__vs
507
#undef A__NAME_PC__vc
508
#undef A__NAME_PC__hi
509
#undef A__NAME_PC__ls
510
#undef A__NAME_PC__ge
511
#undef A__NAME_PC__lt
512
#undef A__NAME_PC__gt
513
#undef A__NAME_PC__le
514
#undef A__NAME__general
515
#undef A__NAME_PC
516
#undef A__NAME
517
#define A__NAME__general arm_instr_load_w1_byte_u1_p1_reg__general
518
#define A__NAME arm_instr_load_w1_byte_u1_p1_reg
519
#define A__NAME__eq arm_instr_load_w1_byte_u1_p1_reg__eq
520
#define A__NAME__ne arm_instr_load_w1_byte_u1_p1_reg__ne
521
#define A__NAME__cs arm_instr_load_w1_byte_u1_p1_reg__cs
522
#define A__NAME__cc arm_instr_load_w1_byte_u1_p1_reg__cc
523
#define A__NAME__mi arm_instr_load_w1_byte_u1_p1_reg__mi
524
#define A__NAME__pl arm_instr_load_w1_byte_u1_p1_reg__pl
525
#define A__NAME__vs arm_instr_load_w1_byte_u1_p1_reg__vs
526
#define A__NAME__vc arm_instr_load_w1_byte_u1_p1_reg__vc
527
#define A__NAME__hi arm_instr_load_w1_byte_u1_p1_reg__hi
528
#define A__NAME__ls arm_instr_load_w1_byte_u1_p1_reg__ls
529
#define A__NAME__ge arm_instr_load_w1_byte_u1_p1_reg__ge
530
#define A__NAME__lt arm_instr_load_w1_byte_u1_p1_reg__lt
531
#define A__NAME__gt arm_instr_load_w1_byte_u1_p1_reg__gt
532
#define A__NAME__le arm_instr_load_w1_byte_u1_p1_reg__le
533
#define A__NAME_PC arm_instr_load_w1_byte_u1_p1_reg_pc
534
#define A__NAME_PC__eq arm_instr_load_w1_byte_u1_p1_reg_pc__eq
535
#define A__NAME_PC__ne arm_instr_load_w1_byte_u1_p1_reg_pc__ne
536
#define A__NAME_PC__cs arm_instr_load_w1_byte_u1_p1_reg_pc__cs
537
#define A__NAME_PC__cc arm_instr_load_w1_byte_u1_p1_reg_pc__cc
538
#define A__NAME_PC__mi arm_instr_load_w1_byte_u1_p1_reg_pc__mi
539
#define A__NAME_PC__pl arm_instr_load_w1_byte_u1_p1_reg_pc__pl
540
#define A__NAME_PC__vs arm_instr_load_w1_byte_u1_p1_reg_pc__vs
541
#define A__NAME_PC__vc arm_instr_load_w1_byte_u1_p1_reg_pc__vc
542
#define A__NAME_PC__hi arm_instr_load_w1_byte_u1_p1_reg_pc__hi
543
#define A__NAME_PC__ls arm_instr_load_w1_byte_u1_p1_reg_pc__ls
544
#define A__NAME_PC__ge arm_instr_load_w1_byte_u1_p1_reg_pc__ge
545
#define A__NAME_PC__lt arm_instr_load_w1_byte_u1_p1_reg_pc__lt
546
#define A__NAME_PC__gt arm_instr_load_w1_byte_u1_p1_reg_pc__gt
547
#define A__NAME_PC__le arm_instr_load_w1_byte_u1_p1_reg_pc__le
548
#define A__L
549
#define A__W
550
#define A__B
551
#define A__U
552
#define A__P
553
#define A__REG
554
#include "
cpu_arm_instr_loadstore.cc
"
555
#undef A__L
556
#undef A__W
557
#undef A__B
558
#undef A__U
559
#undef A__P
560
#undef A__REG
561
#undef A__NAME__eq
562
#undef A__NAME__ne
563
#undef A__NAME__cs
564
#undef A__NAME__cc
565
#undef A__NAME__mi
566
#undef A__NAME__pl
567
#undef A__NAME__vs
568
#undef A__NAME__vc
569
#undef A__NAME__hi
570
#undef A__NAME__ls
571
#undef A__NAME__ge
572
#undef A__NAME__lt
573
#undef A__NAME__gt
574
#undef A__NAME__le
575
#undef A__NAME_PC__eq
576
#undef A__NAME_PC__ne
577
#undef A__NAME_PC__cs
578
#undef A__NAME_PC__cc
579
#undef A__NAME_PC__mi
580
#undef A__NAME_PC__pl
581
#undef A__NAME_PC__vs
582
#undef A__NAME_PC__vc
583
#undef A__NAME_PC__hi
584
#undef A__NAME_PC__ls
585
#undef A__NAME_PC__ge
586
#undef A__NAME_PC__lt
587
#undef A__NAME_PC__gt
588
#undef A__NAME_PC__le
589
#undef A__NAME__general
590
#undef A__NAME_PC
591
#undef A__NAME
592
#define A__NAME__general arm_instr_store_w1_signed_byte_u1_p1_imm__general
593
#define A__NAME arm_instr_store_w1_signed_byte_u1_p1_imm
594
#define A__NAME__eq arm_instr_store_w1_signed_byte_u1_p1_imm__eq
595
#define A__NAME__ne arm_instr_store_w1_signed_byte_u1_p1_imm__ne
596
#define A__NAME__cs arm_instr_store_w1_signed_byte_u1_p1_imm__cs
597
#define A__NAME__cc arm_instr_store_w1_signed_byte_u1_p1_imm__cc
598
#define A__NAME__mi arm_instr_store_w1_signed_byte_u1_p1_imm__mi
599
#define A__NAME__pl arm_instr_store_w1_signed_byte_u1_p1_imm__pl
600
#define A__NAME__vs arm_instr_store_w1_signed_byte_u1_p1_imm__vs
601
#define A__NAME__vc arm_instr_store_w1_signed_byte_u1_p1_imm__vc
602
#define A__NAME__hi arm_instr_store_w1_signed_byte_u1_p1_imm__hi
603
#define A__NAME__ls arm_instr_store_w1_signed_byte_u1_p1_imm__ls
604
#define A__NAME__ge arm_instr_store_w1_signed_byte_u1_p1_imm__ge
605
#define A__NAME__lt arm_instr_store_w1_signed_byte_u1_p1_imm__lt
606
#define A__NAME__gt arm_instr_store_w1_signed_byte_u1_p1_imm__gt
607
#define A__NAME__le arm_instr_store_w1_signed_byte_u1_p1_imm__le
608
#define A__NAME_PC arm_instr_store_w1_signed_byte_u1_p1_imm_pc
609
#define A__NAME_PC__eq arm_instr_store_w1_signed_byte_u1_p1_imm_pc__eq
610
#define A__NAME_PC__ne arm_instr_store_w1_signed_byte_u1_p1_imm_pc__ne
611
#define A__NAME_PC__cs arm_instr_store_w1_signed_byte_u1_p1_imm_pc__cs
612
#define A__NAME_PC__cc arm_instr_store_w1_signed_byte_u1_p1_imm_pc__cc
613
#define A__NAME_PC__mi arm_instr_store_w1_signed_byte_u1_p1_imm_pc__mi
614
#define A__NAME_PC__pl arm_instr_store_w1_signed_byte_u1_p1_imm_pc__pl
615
#define A__NAME_PC__vs arm_instr_store_w1_signed_byte_u1_p1_imm_pc__vs
616
#define A__NAME_PC__vc arm_instr_store_w1_signed_byte_u1_p1_imm_pc__vc
617
#define A__NAME_PC__hi arm_instr_store_w1_signed_byte_u1_p1_imm_pc__hi
618
#define A__NAME_PC__ls arm_instr_store_w1_signed_byte_u1_p1_imm_pc__ls
619
#define A__NAME_PC__ge arm_instr_store_w1_signed_byte_u1_p1_imm_pc__ge
620
#define A__NAME_PC__lt arm_instr_store_w1_signed_byte_u1_p1_imm_pc__lt
621
#define A__NAME_PC__gt arm_instr_store_w1_signed_byte_u1_p1_imm_pc__gt
622
#define A__NAME_PC__le arm_instr_store_w1_signed_byte_u1_p1_imm_pc__le
623
#define A__SIGNED
624
#define A__W
625
#define A__B
626
#define A__U
627
#define A__P
628
#include "
cpu_arm_instr_loadstore.cc
"
629
#undef A__SIGNED
630
#undef A__W
631
#undef A__B
632
#undef A__U
633
#undef A__P
634
#undef A__NAME__eq
635
#undef A__NAME__ne
636
#undef A__NAME__cs
637
#undef A__NAME__cc
638
#undef A__NAME__mi
639
#undef A__NAME__pl
640
#undef A__NAME__vs
641
#undef A__NAME__vc
642
#undef A__NAME__hi
643
#undef A__NAME__ls
644
#undef A__NAME__ge
645
#undef A__NAME__lt
646
#undef A__NAME__gt
647
#undef A__NAME__le
648
#undef A__NAME_PC__eq
649
#undef A__NAME_PC__ne
650
#undef A__NAME_PC__cs
651
#undef A__NAME_PC__cc
652
#undef A__NAME_PC__mi
653
#undef A__NAME_PC__pl
654
#undef A__NAME_PC__vs
655
#undef A__NAME_PC__vc
656
#undef A__NAME_PC__hi
657
#undef A__NAME_PC__ls
658
#undef A__NAME_PC__ge
659
#undef A__NAME_PC__lt
660
#undef A__NAME_PC__gt
661
#undef A__NAME_PC__le
662
#undef A__NAME__general
663
#undef A__NAME_PC
664
#undef A__NAME
665
#define A__NAME__general arm_instr_load_w1_signed_byte_u1_p1_imm__general
666
#define A__NAME arm_instr_load_w1_signed_byte_u1_p1_imm
667
#define A__NAME__eq arm_instr_load_w1_signed_byte_u1_p1_imm__eq
668
#define A__NAME__ne arm_instr_load_w1_signed_byte_u1_p1_imm__ne
669
#define A__NAME__cs arm_instr_load_w1_signed_byte_u1_p1_imm__cs
670
#define A__NAME__cc arm_instr_load_w1_signed_byte_u1_p1_imm__cc
671
#define A__NAME__mi arm_instr_load_w1_signed_byte_u1_p1_imm__mi
672
#define A__NAME__pl arm_instr_load_w1_signed_byte_u1_p1_imm__pl
673
#define A__NAME__vs arm_instr_load_w1_signed_byte_u1_p1_imm__vs
674
#define A__NAME__vc arm_instr_load_w1_signed_byte_u1_p1_imm__vc
675
#define A__NAME__hi arm_instr_load_w1_signed_byte_u1_p1_imm__hi
676
#define A__NAME__ls arm_instr_load_w1_signed_byte_u1_p1_imm__ls
677
#define A__NAME__ge arm_instr_load_w1_signed_byte_u1_p1_imm__ge
678
#define A__NAME__lt arm_instr_load_w1_signed_byte_u1_p1_imm__lt
679
#define A__NAME__gt arm_instr_load_w1_signed_byte_u1_p1_imm__gt
680
#define A__NAME__le arm_instr_load_w1_signed_byte_u1_p1_imm__le
681
#define A__NAME_PC arm_instr_load_w1_signed_byte_u1_p1_imm_pc
682
#define A__NAME_PC__eq arm_instr_load_w1_signed_byte_u1_p1_imm_pc__eq
683
#define A__NAME_PC__ne arm_instr_load_w1_signed_byte_u1_p1_imm_pc__ne
684
#define A__NAME_PC__cs arm_instr_load_w1_signed_byte_u1_p1_imm_pc__cs
685
#define A__NAME_PC__cc arm_instr_load_w1_signed_byte_u1_p1_imm_pc__cc
686
#define A__NAME_PC__mi arm_instr_load_w1_signed_byte_u1_p1_imm_pc__mi
687
#define A__NAME_PC__pl arm_instr_load_w1_signed_byte_u1_p1_imm_pc__pl
688
#define A__NAME_PC__vs arm_instr_load_w1_signed_byte_u1_p1_imm_pc__vs
689
#define A__NAME_PC__vc arm_instr_load_w1_signed_byte_u1_p1_imm_pc__vc
690
#define A__NAME_PC__hi arm_instr_load_w1_signed_byte_u1_p1_imm_pc__hi
691
#define A__NAME_PC__ls arm_instr_load_w1_signed_byte_u1_p1_imm_pc__ls
692
#define A__NAME_PC__ge arm_instr_load_w1_signed_byte_u1_p1_imm_pc__ge
693
#define A__NAME_PC__lt arm_instr_load_w1_signed_byte_u1_p1_imm_pc__lt
694
#define A__NAME_PC__gt arm_instr_load_w1_signed_byte_u1_p1_imm_pc__gt
695
#define A__NAME_PC__le arm_instr_load_w1_signed_byte_u1_p1_imm_pc__le
696
#define A__SIGNED
697
#define A__L
698
#define A__W
699
#define A__B
700
#define A__U
701
#define A__P
702
#include "
cpu_arm_instr_loadstore.cc
"
703
#undef A__SIGNED
704
#undef A__L
705
#undef A__W
706
#undef A__B
707
#undef A__U
708
#undef A__P
709
#undef A__NAME__eq
710
#undef A__NAME__ne
711
#undef A__NAME__cs
712
#undef A__NAME__cc
713
#undef A__NAME__mi
714
#undef A__NAME__pl
715
#undef A__NAME__vs
716
#undef A__NAME__vc
717
#undef A__NAME__hi
718
#undef A__NAME__ls
719
#undef A__NAME__ge
720
#undef A__NAME__lt
721
#undef A__NAME__gt
722
#undef A__NAME__le
723
#undef A__NAME_PC__eq
724
#undef A__NAME_PC__ne
725
#undef A__NAME_PC__cs
726
#undef A__NAME_PC__cc
727
#undef A__NAME_PC__mi
728
#undef A__NAME_PC__pl
729
#undef A__NAME_PC__vs
730
#undef A__NAME_PC__vc
731
#undef A__NAME_PC__hi
732
#undef A__NAME_PC__ls
733
#undef A__NAME_PC__ge
734
#undef A__NAME_PC__lt
735
#undef A__NAME_PC__gt
736
#undef A__NAME_PC__le
737
#undef A__NAME__general
738
#undef A__NAME_PC
739
#undef A__NAME
740
#define A__NAME__general arm_instr_store_w1_unsigned_halfword_u1_p1_imm__general
741
#define A__NAME arm_instr_store_w1_unsigned_halfword_u1_p1_imm
742
#define A__NAME__eq arm_instr_store_w1_unsigned_halfword_u1_p1_imm__eq
743
#define A__NAME__ne arm_instr_store_w1_unsigned_halfword_u1_p1_imm__ne
744
#define A__NAME__cs arm_instr_store_w1_unsigned_halfword_u1_p1_imm__cs
745
#define A__NAME__cc arm_instr_store_w1_unsigned_halfword_u1_p1_imm__cc
746
#define A__NAME__mi arm_instr_store_w1_unsigned_halfword_u1_p1_imm__mi
747
#define A__NAME__pl arm_instr_store_w1_unsigned_halfword_u1_p1_imm__pl
748
#define A__NAME__vs arm_instr_store_w1_unsigned_halfword_u1_p1_imm__vs
749
#define A__NAME__vc arm_instr_store_w1_unsigned_halfword_u1_p1_imm__vc
750
#define A__NAME__hi arm_instr_store_w1_unsigned_halfword_u1_p1_imm__hi
751
#define A__NAME__ls arm_instr_store_w1_unsigned_halfword_u1_p1_imm__ls
752
#define A__NAME__ge arm_instr_store_w1_unsigned_halfword_u1_p1_imm__ge
753
#define A__NAME__lt arm_instr_store_w1_unsigned_halfword_u1_p1_imm__lt
754
#define A__NAME__gt arm_instr_store_w1_unsigned_halfword_u1_p1_imm__gt
755
#define A__NAME__le arm_instr_store_w1_unsigned_halfword_u1_p1_imm__le
756
#define A__NAME_PC arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc
757
#define A__NAME_PC__eq arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__eq
758
#define A__NAME_PC__ne arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__ne
759
#define A__NAME_PC__cs arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__cs
760
#define A__NAME_PC__cc arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__cc
761
#define A__NAME_PC__mi arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__mi
762
#define A__NAME_PC__pl arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__pl
763
#define A__NAME_PC__vs arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__vs
764
#define A__NAME_PC__vc arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__vc
765
#define A__NAME_PC__hi arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__hi
766
#define A__NAME_PC__ls arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__ls
767
#define A__NAME_PC__ge arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__ge
768
#define A__NAME_PC__lt arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__lt
769
#define A__NAME_PC__gt arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__gt
770
#define A__NAME_PC__le arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__le
771
#define A__W
772
#define A__H
773
#define A__U
774
#define A__P
775
#include "
cpu_arm_instr_loadstore.cc
"
776
#undef A__W
777
#undef A__H
778
#undef A__U
779
#undef A__P
780
#undef A__NAME__eq
781
#undef A__NAME__ne
782
#undef A__NAME__cs
783
#undef A__NAME__cc
784
#undef A__NAME__mi
785
#undef A__NAME__pl
786
#undef A__NAME__vs
787
#undef A__NAME__vc
788
#undef A__NAME__hi
789
#undef A__NAME__ls
790
#undef A__NAME__ge
791
#undef A__NAME__lt
792
#undef A__NAME__gt
793
#undef A__NAME__le
794
#undef A__NAME_PC__eq
795
#undef A__NAME_PC__ne
796
#undef A__NAME_PC__cs
797
#undef A__NAME_PC__cc
798
#undef A__NAME_PC__mi
799
#undef A__NAME_PC__pl
800
#undef A__NAME_PC__vs
801
#undef A__NAME_PC__vc
802
#undef A__NAME_PC__hi
803
#undef A__NAME_PC__ls
804
#undef A__NAME_PC__ge
805
#undef A__NAME_PC__lt
806
#undef A__NAME_PC__gt
807
#undef A__NAME_PC__le
808
#undef A__NAME__general
809
#undef A__NAME_PC
810
#undef A__NAME
811
#define A__NAME__general arm_instr_load_w1_unsigned_halfword_u1_p1_imm__general
812
#define A__NAME arm_instr_load_w1_unsigned_halfword_u1_p1_imm
813
#define A__NAME__eq arm_instr_load_w1_unsigned_halfword_u1_p1_imm__eq
814
#define A__NAME__ne arm_instr_load_w1_unsigned_halfword_u1_p1_imm__ne
815
#define A__NAME__cs arm_instr_load_w1_unsigned_halfword_u1_p1_imm__cs
816
#define A__NAME__cc arm_instr_load_w1_unsigned_halfword_u1_p1_imm__cc
817
#define A__NAME__mi arm_instr_load_w1_unsigned_halfword_u1_p1_imm__mi
818
#define A__NAME__pl arm_instr_load_w1_unsigned_halfword_u1_p1_imm__pl
819
#define A__NAME__vs arm_instr_load_w1_unsigned_halfword_u1_p1_imm__vs
820
#define A__NAME__vc arm_instr_load_w1_unsigned_halfword_u1_p1_imm__vc
821
#define A__NAME__hi arm_instr_load_w1_unsigned_halfword_u1_p1_imm__hi
822
#define A__NAME__ls arm_instr_load_w1_unsigned_halfword_u1_p1_imm__ls
823
#define A__NAME__ge arm_instr_load_w1_unsigned_halfword_u1_p1_imm__ge
824
#define A__NAME__lt arm_instr_load_w1_unsigned_halfword_u1_p1_imm__lt
825
#define A__NAME__gt arm_instr_load_w1_unsigned_halfword_u1_p1_imm__gt
826
#define A__NAME__le arm_instr_load_w1_unsigned_halfword_u1_p1_imm__le
827
#define A__NAME_PC arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc
828
#define A__NAME_PC__eq arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__eq
829
#define A__NAME_PC__ne arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__ne
830
#define A__NAME_PC__cs arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__cs
831
#define A__NAME_PC__cc arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__cc
832
#define A__NAME_PC__mi arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__mi
833
#define A__NAME_PC__pl arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__pl
834
#define A__NAME_PC__vs arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__vs
835
#define A__NAME_PC__vc arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__vc
836
#define A__NAME_PC__hi arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__hi
837
#define A__NAME_PC__ls arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__ls
838
#define A__NAME_PC__ge arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__ge
839
#define A__NAME_PC__lt arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__lt
840
#define A__NAME_PC__gt arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__gt
841
#define A__NAME_PC__le arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__le
842
#define A__L
843
#define A__W
844
#define A__H
845
#define A__U
846
#define A__P
847
#include "
cpu_arm_instr_loadstore.cc
"
848
#undef A__L
849
#undef A__W
850
#undef A__H
851
#undef A__U
852
#undef A__P
853
#undef A__NAME__eq
854
#undef A__NAME__ne
855
#undef A__NAME__cs
856
#undef A__NAME__cc
857
#undef A__NAME__mi
858
#undef A__NAME__pl
859
#undef A__NAME__vs
860
#undef A__NAME__vc
861
#undef A__NAME__hi
862
#undef A__NAME__ls
863
#undef A__NAME__ge
864
#undef A__NAME__lt
865
#undef A__NAME__gt
866
#undef A__NAME__le
867
#undef A__NAME_PC__eq
868
#undef A__NAME_PC__ne
869
#undef A__NAME_PC__cs
870
#undef A__NAME_PC__cc
871
#undef A__NAME_PC__mi
872
#undef A__NAME_PC__pl
873
#undef A__NAME_PC__vs
874
#undef A__NAME_PC__vc
875
#undef A__NAME_PC__hi
876
#undef A__NAME_PC__ls
877
#undef A__NAME_PC__ge
878
#undef A__NAME_PC__lt
879
#undef A__NAME_PC__gt
880
#undef A__NAME_PC__le
881
#undef A__NAME__general
882
#undef A__NAME_PC
883
#undef A__NAME
884
#define A__NAME__general arm_instr_store_w1_signed_halfword_u1_p1_imm__general
885
#define A__NAME arm_instr_store_w1_signed_halfword_u1_p1_imm
886
#define A__NAME__eq arm_instr_store_w1_signed_halfword_u1_p1_imm__eq
887
#define A__NAME__ne arm_instr_store_w1_signed_halfword_u1_p1_imm__ne
888
#define A__NAME__cs arm_instr_store_w1_signed_halfword_u1_p1_imm__cs
889
#define A__NAME__cc arm_instr_store_w1_signed_halfword_u1_p1_imm__cc
890
#define A__NAME__mi arm_instr_store_w1_signed_halfword_u1_p1_imm__mi
891
#define A__NAME__pl arm_instr_store_w1_signed_halfword_u1_p1_imm__pl
892
#define A__NAME__vs arm_instr_store_w1_signed_halfword_u1_p1_imm__vs
893
#define A__NAME__vc arm_instr_store_w1_signed_halfword_u1_p1_imm__vc
894
#define A__NAME__hi arm_instr_store_w1_signed_halfword_u1_p1_imm__hi
895
#define A__NAME__ls arm_instr_store_w1_signed_halfword_u1_p1_imm__ls
896
#define A__NAME__ge arm_instr_store_w1_signed_halfword_u1_p1_imm__ge
897
#define A__NAME__lt arm_instr_store_w1_signed_halfword_u1_p1_imm__lt
898
#define A__NAME__gt arm_instr_store_w1_signed_halfword_u1_p1_imm__gt
899
#define A__NAME__le arm_instr_store_w1_signed_halfword_u1_p1_imm__le
900
#define A__NAME_PC arm_instr_store_w1_signed_halfword_u1_p1_imm_pc
901
#define A__NAME_PC__eq arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__eq
902
#define A__NAME_PC__ne arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__ne
903
#define A__NAME_PC__cs arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__cs
904
#define A__NAME_PC__cc arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__cc
905
#define A__NAME_PC__mi arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__mi
906
#define A__NAME_PC__pl arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__pl
907
#define A__NAME_PC__vs arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__vs
908
#define A__NAME_PC__vc arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__vc
909
#define A__NAME_PC__hi arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__hi
910
#define A__NAME_PC__ls arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__ls
911
#define A__NAME_PC__ge arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__ge
912
#define A__NAME_PC__lt arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__lt
913
#define A__NAME_PC__gt arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__gt
914
#define A__NAME_PC__le arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__le
915
#define A__SIGNED
916
#define A__W
917
#define A__H
918
#define A__U
919
#define A__P
920
#include "
cpu_arm_instr_loadstore.cc
"
921
#undef A__SIGNED
922
#undef A__W
923
#undef A__H
924
#undef A__U
925
#undef A__P
926
#undef A__NAME__eq
927
#undef A__NAME__ne
928
#undef A__NAME__cs
929
#undef A__NAME__cc
930
#undef A__NAME__mi
931
#undef A__NAME__pl
932
#undef A__NAME__vs
933
#undef A__NAME__vc
934
#undef A__NAME__hi
935
#undef A__NAME__ls
936
#undef A__NAME__ge
937
#undef A__NAME__lt
938
#undef A__NAME__gt
939
#undef A__NAME__le
940
#undef A__NAME_PC__eq
941
#undef A__NAME_PC__ne
942
#undef A__NAME_PC__cs
943
#undef A__NAME_PC__cc
944
#undef A__NAME_PC__mi
945
#undef A__NAME_PC__pl
946
#undef A__NAME_PC__vs
947
#undef A__NAME_PC__vc
948
#undef A__NAME_PC__hi
949
#undef A__NAME_PC__ls
950
#undef A__NAME_PC__ge
951
#undef A__NAME_PC__lt
952
#undef A__NAME_PC__gt
953
#undef A__NAME_PC__le
954
#undef A__NAME__general
955
#undef A__NAME_PC
956
#undef A__NAME
957
#define A__NAME__general arm_instr_load_w1_signed_halfword_u1_p1_imm__general
958
#define A__NAME arm_instr_load_w1_signed_halfword_u1_p1_imm
959
#define A__NAME__eq arm_instr_load_w1_signed_halfword_u1_p1_imm__eq
960
#define A__NAME__ne arm_instr_load_w1_signed_halfword_u1_p1_imm__ne
961
#define A__NAME__cs arm_instr_load_w1_signed_halfword_u1_p1_imm__cs
962
#define A__NAME__cc arm_instr_load_w1_signed_halfword_u1_p1_imm__cc
963
#define A__NAME__mi arm_instr_load_w1_signed_halfword_u1_p1_imm__mi
964
#define A__NAME__pl arm_instr_load_w1_signed_halfword_u1_p1_imm__pl
965
#define A__NAME__vs arm_instr_load_w1_signed_halfword_u1_p1_imm__vs
966
#define A__NAME__vc arm_instr_load_w1_signed_halfword_u1_p1_imm__vc
967
#define A__NAME__hi arm_instr_load_w1_signed_halfword_u1_p1_imm__hi
968
#define A__NAME__ls arm_instr_load_w1_signed_halfword_u1_p1_imm__ls
969
#define A__NAME__ge arm_instr_load_w1_signed_halfword_u1_p1_imm__ge
970
#define A__NAME__lt arm_instr_load_w1_signed_halfword_u1_p1_imm__lt
971
#define A__NAME__gt arm_instr_load_w1_signed_halfword_u1_p1_imm__gt
972
#define A__NAME__le arm_instr_load_w1_signed_halfword_u1_p1_imm__le
973
#define A__NAME_PC arm_instr_load_w1_signed_halfword_u1_p1_imm_pc
974
#define A__NAME_PC__eq arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__eq
975
#define A__NAME_PC__ne arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__ne
976
#define A__NAME_PC__cs arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__cs
977
#define A__NAME_PC__cc arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__cc
978
#define A__NAME_PC__mi arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__mi
979
#define A__NAME_PC__pl arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__pl
980
#define A__NAME_PC__vs arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__vs
981
#define A__NAME_PC__vc arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__vc
982
#define A__NAME_PC__hi arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__hi
983
#define A__NAME_PC__ls arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__ls
984
#define A__NAME_PC__ge arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__ge
985
#define A__NAME_PC__lt arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__lt
986
#define A__NAME_PC__gt arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__gt
987
#define A__NAME_PC__le arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__le
988
#define A__SIGNED
989
#define A__L
990
#define A__W
991
#define A__H
992
#define A__U
993
#define A__P
994
#include "
cpu_arm_instr_loadstore.cc
"
995
#undef A__SIGNED
996
#undef A__L
997
#undef A__W
998
#undef A__H
999
#undef A__U
1000
#undef A__P
1001
#undef A__NAME__eq
1002
#undef A__NAME__ne
1003
#undef A__NAME__cs
1004
#undef A__NAME__cc
1005
#undef A__NAME__mi
1006
#undef A__NAME__pl
1007
#undef A__NAME__vs
1008
#undef A__NAME__vc
1009
#undef A__NAME__hi
1010
#undef A__NAME__ls
1011
#undef A__NAME__ge
1012
#undef A__NAME__lt
1013
#undef A__NAME__gt
1014
#undef A__NAME__le
1015
#undef A__NAME_PC__eq
1016
#undef A__NAME_PC__ne
1017
#undef A__NAME_PC__cs
1018
#undef A__NAME_PC__cc
1019
#undef A__NAME_PC__mi
1020
#undef A__NAME_PC__pl
1021
#undef A__NAME_PC__vs
1022
#undef A__NAME_PC__vc
1023
#undef A__NAME_PC__hi
1024
#undef A__NAME_PC__ls
1025
#undef A__NAME_PC__ge
1026
#undef A__NAME_PC__lt
1027
#undef A__NAME_PC__gt
1028
#undef A__NAME_PC__le
1029
#undef A__NAME__general
1030
#undef A__NAME_PC
1031
#undef A__NAME
1032
#define A__NAME__general arm_instr_store_w1_signed_byte_u1_p1_reg__general
1033
#define A__NAME arm_instr_store_w1_signed_byte_u1_p1_reg
1034
#define A__NAME__eq arm_instr_store_w1_signed_byte_u1_p1_reg__eq
1035
#define A__NAME__ne arm_instr_store_w1_signed_byte_u1_p1_reg__ne
1036
#define A__NAME__cs arm_instr_store_w1_signed_byte_u1_p1_reg__cs
1037
#define A__NAME__cc arm_instr_store_w1_signed_byte_u1_p1_reg__cc
1038
#define A__NAME__mi arm_instr_store_w1_signed_byte_u1_p1_reg__mi
1039
#define A__NAME__pl arm_instr_store_w1_signed_byte_u1_p1_reg__pl
1040
#define A__NAME__vs arm_instr_store_w1_signed_byte_u1_p1_reg__vs
1041
#define A__NAME__vc arm_instr_store_w1_signed_byte_u1_p1_reg__vc
1042
#define A__NAME__hi arm_instr_store_w1_signed_byte_u1_p1_reg__hi
1043
#define A__NAME__ls arm_instr_store_w1_signed_byte_u1_p1_reg__ls
1044
#define A__NAME__ge arm_instr_store_w1_signed_byte_u1_p1_reg__ge
1045
#define A__NAME__lt arm_instr_store_w1_signed_byte_u1_p1_reg__lt
1046
#define A__NAME__gt arm_instr_store_w1_signed_byte_u1_p1_reg__gt
1047
#define A__NAME__le arm_instr_store_w1_signed_byte_u1_p1_reg__le
1048
#define A__NAME_PC arm_instr_store_w1_signed_byte_u1_p1_reg_pc
1049
#define A__NAME_PC__eq arm_instr_store_w1_signed_byte_u1_p1_reg_pc__eq
1050
#define A__NAME_PC__ne arm_instr_store_w1_signed_byte_u1_p1_reg_pc__ne
1051
#define A__NAME_PC__cs arm_instr_store_w1_signed_byte_u1_p1_reg_pc__cs
1052
#define A__NAME_PC__cc arm_instr_store_w1_signed_byte_u1_p1_reg_pc__cc
1053
#define A__NAME_PC__mi arm_instr_store_w1_signed_byte_u1_p1_reg_pc__mi
1054
#define A__NAME_PC__pl arm_instr_store_w1_signed_byte_u1_p1_reg_pc__pl
1055
#define A__NAME_PC__vs arm_instr_store_w1_signed_byte_u1_p1_reg_pc__vs
1056
#define A__NAME_PC__vc arm_instr_store_w1_signed_byte_u1_p1_reg_pc__vc
1057
#define A__NAME_PC__hi arm_instr_store_w1_signed_byte_u1_p1_reg_pc__hi
1058
#define A__NAME_PC__ls arm_instr_store_w1_signed_byte_u1_p1_reg_pc__ls
1059
#define A__NAME_PC__ge arm_instr_store_w1_signed_byte_u1_p1_reg_pc__ge
1060
#define A__NAME_PC__lt arm_instr_store_w1_signed_byte_u1_p1_reg_pc__lt
1061
#define A__NAME_PC__gt arm_instr_store_w1_signed_byte_u1_p1_reg_pc__gt
1062
#define A__NAME_PC__le arm_instr_store_w1_signed_byte_u1_p1_reg_pc__le
1063
#define A__SIGNED
1064
#define A__W
1065
#define A__B
1066
#define A__U
1067
#define A__P
1068
#define A__REG
1069
#include "
cpu_arm_instr_loadstore.cc
"
1070
#undef A__SIGNED
1071
#undef A__W
1072
#undef A__B
1073
#undef A__U
1074
#undef A__P
1075
#undef A__REG
1076
#undef A__NAME__eq
1077
#undef A__NAME__ne
1078
#undef A__NAME__cs
1079
#undef A__NAME__cc
1080
#undef A__NAME__mi
1081
#undef A__NAME__pl
1082
#undef A__NAME__vs
1083
#undef A__NAME__vc
1084
#undef A__NAME__hi
1085
#undef A__NAME__ls
1086
#undef A__NAME__ge
1087
#undef A__NAME__lt
1088
#undef A__NAME__gt
1089
#undef A__NAME__le
1090
#undef A__NAME_PC__eq
1091
#undef A__NAME_PC__ne
1092
#undef A__NAME_PC__cs
1093
#undef A__NAME_PC__cc
1094
#undef A__NAME_PC__mi
1095
#undef A__NAME_PC__pl
1096
#undef A__NAME_PC__vs
1097
#undef A__NAME_PC__vc
1098
#undef A__NAME_PC__hi
1099
#undef A__NAME_PC__ls
1100
#undef A__NAME_PC__ge
1101
#undef A__NAME_PC__lt
1102
#undef A__NAME_PC__gt
1103
#undef A__NAME_PC__le
1104
#undef A__NAME__general
1105
#undef A__NAME_PC
1106
#undef A__NAME
1107
#define A__NAME__general arm_instr_load_w1_signed_byte_u1_p1_reg__general
1108
#define A__NAME arm_instr_load_w1_signed_byte_u1_p1_reg
1109
#define A__NAME__eq arm_instr_load_w1_signed_byte_u1_p1_reg__eq
1110
#define A__NAME__ne arm_instr_load_w1_signed_byte_u1_p1_reg__ne
1111
#define A__NAME__cs arm_instr_load_w1_signed_byte_u1_p1_reg__cs
1112
#define A__NAME__cc arm_instr_load_w1_signed_byte_u1_p1_reg__cc
1113
#define A__NAME__mi arm_instr_load_w1_signed_byte_u1_p1_reg__mi
1114
#define A__NAME__pl arm_instr_load_w1_signed_byte_u1_p1_reg__pl
1115
#define A__NAME__vs arm_instr_load_w1_signed_byte_u1_p1_reg__vs
1116
#define A__NAME__vc arm_instr_load_w1_signed_byte_u1_p1_reg__vc
1117
#define A__NAME__hi arm_instr_load_w1_signed_byte_u1_p1_reg__hi
1118
#define A__NAME__ls arm_instr_load_w1_signed_byte_u1_p1_reg__ls
1119
#define A__NAME__ge arm_instr_load_w1_signed_byte_u1_p1_reg__ge
1120
#define A__NAME__lt arm_instr_load_w1_signed_byte_u1_p1_reg__lt
1121
#define A__NAME__gt arm_instr_load_w1_signed_byte_u1_p1_reg__gt
1122
#define A__NAME__le arm_instr_load_w1_signed_byte_u1_p1_reg__le
1123
#define A__NAME_PC arm_instr_load_w1_signed_byte_u1_p1_reg_pc
1124
#define A__NAME_PC__eq arm_instr_load_w1_signed_byte_u1_p1_reg_pc__eq
1125
#define A__NAME_PC__ne arm_instr_load_w1_signed_byte_u1_p1_reg_pc__ne
1126
#define A__NAME_PC__cs arm_instr_load_w1_signed_byte_u1_p1_reg_pc__cs
1127
#define A__NAME_PC__cc arm_instr_load_w1_signed_byte_u1_p1_reg_pc__cc
1128
#define A__NAME_PC__mi arm_instr_load_w1_signed_byte_u1_p1_reg_pc__mi
1129
#define A__NAME_PC__pl arm_instr_load_w1_signed_byte_u1_p1_reg_pc__pl
1130
#define A__NAME_PC__vs arm_instr_load_w1_signed_byte_u1_p1_reg_pc__vs
1131
#define A__NAME_PC__vc arm_instr_load_w1_signed_byte_u1_p1_reg_pc__vc
1132
#define A__NAME_PC__hi arm_instr_load_w1_signed_byte_u1_p1_reg_pc__hi
1133
#define A__NAME_PC__ls arm_instr_load_w1_signed_byte_u1_p1_reg_pc__ls
1134
#define A__NAME_PC__ge arm_instr_load_w1_signed_byte_u1_p1_reg_pc__ge
1135
#define A__NAME_PC__lt arm_instr_load_w1_signed_byte_u1_p1_reg_pc__lt
1136
#define A__NAME_PC__gt arm_instr_load_w1_signed_byte_u1_p1_reg_pc__gt
1137
#define A__NAME_PC__le arm_instr_load_w1_signed_byte_u1_p1_reg_pc__le
1138
#define A__SIGNED
1139
#define A__L
1140
#define A__W
1141
#define A__B
1142
#define A__U
1143
#define A__P
1144
#define A__REG
1145
#include "
cpu_arm_instr_loadstore.cc
"
1146
#undef A__SIGNED
1147
#undef A__L
1148
#undef A__W
1149
#undef A__B
1150
#undef A__U
1151
#undef A__P
1152
#undef A__REG
1153
#undef A__NAME__eq
1154
#undef A__NAME__ne
1155
#undef A__NAME__cs
1156
#undef A__NAME__cc
1157
#undef A__NAME__mi
1158
#undef A__NAME__pl
1159
#undef A__NAME__vs
1160
#undef A__NAME__vc
1161
#undef A__NAME__hi
1162
#undef A__NAME__ls
1163
#undef A__NAME__ge
1164
#undef A__NAME__lt
1165
#undef A__NAME__gt
1166
#undef A__NAME__le
1167
#undef A__NAME_PC__eq
1168
#undef A__NAME_PC__ne
1169
#undef A__NAME_PC__cs
1170
#undef A__NAME_PC__cc
1171
#undef A__NAME_PC__mi
1172
#undef A__NAME_PC__pl
1173
#undef A__NAME_PC__vs
1174
#undef A__NAME_PC__vc
1175
#undef A__NAME_PC__hi
1176
#undef A__NAME_PC__ls
1177
#undef A__NAME_PC__ge
1178
#undef A__NAME_PC__lt
1179
#undef A__NAME_PC__gt
1180
#undef A__NAME_PC__le
1181
#undef A__NAME__general
1182
#undef A__NAME_PC
1183
#undef A__NAME
1184
#define A__NAME__general arm_instr_store_w1_unsigned_halfword_u1_p1_reg__general
1185
#define A__NAME arm_instr_store_w1_unsigned_halfword_u1_p1_reg
1186
#define A__NAME__eq arm_instr_store_w1_unsigned_halfword_u1_p1_reg__eq
1187
#define A__NAME__ne arm_instr_store_w1_unsigned_halfword_u1_p1_reg__ne
1188
#define A__NAME__cs arm_instr_store_w1_unsigned_halfword_u1_p1_reg__cs
1189
#define A__NAME__cc arm_instr_store_w1_unsigned_halfword_u1_p1_reg__cc
1190
#define A__NAME__mi arm_instr_store_w1_unsigned_halfword_u1_p1_reg__mi
1191
#define A__NAME__pl arm_instr_store_w1_unsigned_halfword_u1_p1_reg__pl
1192
#define A__NAME__vs arm_instr_store_w1_unsigned_halfword_u1_p1_reg__vs
1193
#define A__NAME__vc arm_instr_store_w1_unsigned_halfword_u1_p1_reg__vc
1194
#define A__NAME__hi arm_instr_store_w1_unsigned_halfword_u1_p1_reg__hi
1195
#define A__NAME__ls arm_instr_store_w1_unsigned_halfword_u1_p1_reg__ls
1196
#define A__NAME__ge arm_instr_store_w1_unsigned_halfword_u1_p1_reg__ge
1197
#define A__NAME__lt arm_instr_store_w1_unsigned_halfword_u1_p1_reg__lt
1198
#define A__NAME__gt arm_instr_store_w1_unsigned_halfword_u1_p1_reg__gt
1199
#define A__NAME__le arm_instr_store_w1_unsigned_halfword_u1_p1_reg__le
1200
#define A__NAME_PC arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc
1201
#define A__NAME_PC__eq arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__eq
1202
#define A__NAME_PC__ne arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__ne
1203
#define A__NAME_PC__cs arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__cs
1204
#define A__NAME_PC__cc arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__cc
1205
#define A__NAME_PC__mi arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__mi
1206
#define A__NAME_PC__pl arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__pl
1207
#define A__NAME_PC__vs arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__vs
1208
#define A__NAME_PC__vc arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__vc
1209
#define A__NAME_PC__hi arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__hi
1210
#define A__NAME_PC__ls arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__ls
1211
#define A__NAME_PC__ge arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__ge
1212
#define A__NAME_PC__lt arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__lt
1213
#define A__NAME_PC__gt arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__gt
1214
#define A__NAME_PC__le arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__le
1215
#define A__W
1216
#define A__H
1217
#define A__U
1218
#define A__P
1219
#define A__REG
1220
#include "
cpu_arm_instr_loadstore.cc
"
1221
#undef A__W
1222
#undef A__H
1223
#undef A__U
1224
#undef A__P
1225
#undef A__REG
1226
#undef A__NAME__eq
1227
#undef A__NAME__ne
1228
#undef A__NAME__cs
1229
#undef A__NAME__cc
1230
#undef A__NAME__mi
1231
#undef A__NAME__pl
1232
#undef A__NAME__vs
1233
#undef A__NAME__vc
1234
#undef A__NAME__hi
1235
#undef A__NAME__ls
1236
#undef A__NAME__ge
1237
#undef A__NAME__lt
1238
#undef A__NAME__gt
1239
#undef A__NAME__le
1240
#undef A__NAME_PC__eq
1241
#undef A__NAME_PC__ne
1242
#undef A__NAME_PC__cs
1243
#undef A__NAME_PC__cc
1244
#undef A__NAME_PC__mi
1245
#undef A__NAME_PC__pl
1246
#undef A__NAME_PC__vs
1247
#undef A__NAME_PC__vc
1248
#undef A__NAME_PC__hi
1249
#undef A__NAME_PC__ls
1250
#undef A__NAME_PC__ge
1251
#undef A__NAME_PC__lt
1252
#undef A__NAME_PC__gt
1253
#undef A__NAME_PC__le
1254
#undef A__NAME__general
1255
#undef A__NAME_PC
1256
#undef A__NAME
1257
#define A__NAME__general arm_instr_load_w1_unsigned_halfword_u1_p1_reg__general
1258
#define A__NAME arm_instr_load_w1_unsigned_halfword_u1_p1_reg
1259
#define A__NAME__eq arm_instr_load_w1_unsigned_halfword_u1_p1_reg__eq
1260
#define A__NAME__ne arm_instr_load_w1_unsigned_halfword_u1_p1_reg__ne
1261
#define A__NAME__cs arm_instr_load_w1_unsigned_halfword_u1_p1_reg__cs
1262
#define A__NAME__cc arm_instr_load_w1_unsigned_halfword_u1_p1_reg__cc
1263
#define A__NAME__mi arm_instr_load_w1_unsigned_halfword_u1_p1_reg__mi
1264
#define A__NAME__pl arm_instr_load_w1_unsigned_halfword_u1_p1_reg__pl
1265
#define A__NAME__vs arm_instr_load_w1_unsigned_halfword_u1_p1_reg__vs
1266
#define A__NAME__vc arm_instr_load_w1_unsigned_halfword_u1_p1_reg__vc
1267
#define A__NAME__hi arm_instr_load_w1_unsigned_halfword_u1_p1_reg__hi
1268
#define A__NAME__ls arm_instr_load_w1_unsigned_halfword_u1_p1_reg__ls
1269
#define A__NAME__ge arm_instr_load_w1_unsigned_halfword_u1_p1_reg__ge
1270
#define A__NAME__lt arm_instr_load_w1_unsigned_halfword_u1_p1_reg__lt
1271
#define A__NAME__gt arm_instr_load_w1_unsigned_halfword_u1_p1_reg__gt
1272
#define A__NAME__le arm_instr_load_w1_unsigned_halfword_u1_p1_reg__le
1273
#define A__NAME_PC arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc
1274
#define A__NAME_PC__eq arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__eq
1275
#define A__NAME_PC__ne arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__ne
1276
#define A__NAME_PC__cs arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__cs
1277
#define A__NAME_PC__cc arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__cc
1278
#define A__NAME_PC__mi arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__mi
1279
#define A__NAME_PC__pl arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__pl
1280
#define A__NAME_PC__vs arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__vs
1281
#define A__NAME_PC__vc arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__vc
1282
#define A__NAME_PC__hi arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__hi
1283
#define A__NAME_PC__ls arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__ls
1284
#define A__NAME_PC__ge arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__ge
1285
#define A__NAME_PC__lt arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__lt
1286
#define A__NAME_PC__gt arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__gt
1287
#define A__NAME_PC__le arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__le
1288
#define A__L
1289
#define A__W
1290
#define A__H
1291
#define A__U
1292
#define A__P
1293
#define A__REG
1294
#include "
cpu_arm_instr_loadstore.cc
"
1295
#undef A__L
1296
#undef A__W
1297
#undef A__H
1298
#undef A__U
1299
#undef A__P
1300
#undef A__REG
1301
#undef A__NAME__eq
1302
#undef A__NAME__ne
1303
#undef A__NAME__cs
1304
#undef A__NAME__cc
1305
#undef A__NAME__mi
1306
#undef A__NAME__pl
1307
#undef A__NAME__vs
1308
#undef A__NAME__vc
1309
#undef A__NAME__hi
1310
#undef A__NAME__ls
1311
#undef A__NAME__ge
1312
#undef A__NAME__lt
1313
#undef A__NAME__gt
1314
#undef A__NAME__le
1315
#undef A__NAME_PC__eq
1316
#undef A__NAME_PC__ne
1317
#undef A__NAME_PC__cs
1318
#undef A__NAME_PC__cc
1319
#undef A__NAME_PC__mi
1320
#undef A__NAME_PC__pl
1321
#undef A__NAME_PC__vs
1322
#undef A__NAME_PC__vc
1323
#undef A__NAME_PC__hi
1324
#undef A__NAME_PC__ls
1325
#undef A__NAME_PC__ge
1326
#undef A__NAME_PC__lt
1327
#undef A__NAME_PC__gt
1328
#undef A__NAME_PC__le
1329
#undef A__NAME__general
1330
#undef A__NAME_PC
1331
#undef A__NAME
1332
#define A__NAME__general arm_instr_store_w1_signed_halfword_u1_p1_reg__general
1333
#define A__NAME arm_instr_store_w1_signed_halfword_u1_p1_reg
1334
#define A__NAME__eq arm_instr_store_w1_signed_halfword_u1_p1_reg__eq
1335
#define A__NAME__ne arm_instr_store_w1_signed_halfword_u1_p1_reg__ne
1336
#define A__NAME__cs arm_instr_store_w1_signed_halfword_u1_p1_reg__cs
1337
#define A__NAME__cc arm_instr_store_w1_signed_halfword_u1_p1_reg__cc
1338
#define A__NAME__mi arm_instr_store_w1_signed_halfword_u1_p1_reg__mi
1339
#define A__NAME__pl arm_instr_store_w1_signed_halfword_u1_p1_reg__pl
1340
#define A__NAME__vs arm_instr_store_w1_signed_halfword_u1_p1_reg__vs
1341
#define A__NAME__vc arm_instr_store_w1_signed_halfword_u1_p1_reg__vc
1342
#define A__NAME__hi arm_instr_store_w1_signed_halfword_u1_p1_reg__hi
1343
#define A__NAME__ls arm_instr_store_w1_signed_halfword_u1_p1_reg__ls
1344
#define A__NAME__ge arm_instr_store_w1_signed_halfword_u1_p1_reg__ge
1345
#define A__NAME__lt arm_instr_store_w1_signed_halfword_u1_p1_reg__lt
1346
#define A__NAME__gt arm_instr_store_w1_signed_halfword_u1_p1_reg__gt
1347
#define A__NAME__le arm_instr_store_w1_signed_halfword_u1_p1_reg__le
1348
#define A__NAME_PC arm_instr_store_w1_signed_halfword_u1_p1_reg_pc
1349
#define A__NAME_PC__eq arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__eq
1350
#define A__NAME_PC__ne arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__ne
1351
#define A__NAME_PC__cs arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__cs
1352
#define A__NAME_PC__cc arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__cc
1353
#define A__NAME_PC__mi arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__mi
1354
#define A__NAME_PC__pl arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__pl
1355
#define A__NAME_PC__vs arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__vs
1356
#define A__NAME_PC__vc arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__vc
1357
#define A__NAME_PC__hi arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__hi
1358
#define A__NAME_PC__ls arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__ls
1359
#define A__NAME_PC__ge arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__ge
1360
#define A__NAME_PC__lt arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__lt
1361
#define A__NAME_PC__gt arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__gt
1362
#define A__NAME_PC__le arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__le
1363
#define A__SIGNED
1364
#define A__W
1365
#define A__H
1366
#define A__U
1367
#define A__P
1368
#define A__REG
1369
#include "
cpu_arm_instr_loadstore.cc
"
1370
#undef A__SIGNED
1371
#undef A__W
1372
#undef A__H
1373
#undef A__U
1374
#undef A__P
1375
#undef A__REG
1376
#undef A__NAME__eq
1377
#undef A__NAME__ne
1378
#undef A__NAME__cs
1379
#undef A__NAME__cc
1380
#undef A__NAME__mi
1381
#undef A__NAME__pl
1382
#undef A__NAME__vs
1383
#undef A__NAME__vc
1384
#undef A__NAME__hi
1385
#undef A__NAME__ls
1386
#undef A__NAME__ge
1387
#undef A__NAME__lt
1388
#undef A__NAME__gt
1389
#undef A__NAME__le
1390
#undef A__NAME_PC__eq
1391
#undef A__NAME_PC__ne
1392
#undef A__NAME_PC__cs
1393
#undef A__NAME_PC__cc
1394
#undef A__NAME_PC__mi
1395
#undef A__NAME_PC__pl
1396
#undef A__NAME_PC__vs
1397
#undef A__NAME_PC__vc
1398
#undef A__NAME_PC__hi
1399
#undef A__NAME_PC__ls
1400
#undef A__NAME_PC__ge
1401
#undef A__NAME_PC__lt
1402
#undef A__NAME_PC__gt
1403
#undef A__NAME_PC__le
1404
#undef A__NAME__general
1405
#undef A__NAME_PC
1406
#undef A__NAME
1407
#define A__NAME__general arm_instr_load_w1_signed_halfword_u1_p1_reg__general
1408
#define A__NAME arm_instr_load_w1_signed_halfword_u1_p1_reg
1409
#define A__NAME__eq arm_instr_load_w1_signed_halfword_u1_p1_reg__eq
1410
#define A__NAME__ne arm_instr_load_w1_signed_halfword_u1_p1_reg__ne
1411
#define A__NAME__cs arm_instr_load_w1_signed_halfword_u1_p1_reg__cs
1412
#define A__NAME__cc arm_instr_load_w1_signed_halfword_u1_p1_reg__cc
1413
#define A__NAME__mi arm_instr_load_w1_signed_halfword_u1_p1_reg__mi
1414
#define A__NAME__pl arm_instr_load_w1_signed_halfword_u1_p1_reg__pl
1415
#define A__NAME__vs arm_instr_load_w1_signed_halfword_u1_p1_reg__vs
1416
#define A__NAME__vc arm_instr_load_w1_signed_halfword_u1_p1_reg__vc
1417
#define A__NAME__hi arm_instr_load_w1_signed_halfword_u1_p1_reg__hi
1418
#define A__NAME__ls arm_instr_load_w1_signed_halfword_u1_p1_reg__ls
1419
#define A__NAME__ge arm_instr_load_w1_signed_halfword_u1_p1_reg__ge
1420
#define A__NAME__lt arm_instr_load_w1_signed_halfword_u1_p1_reg__lt
1421
#define A__NAME__gt arm_instr_load_w1_signed_halfword_u1_p1_reg__gt
1422
#define A__NAME__le arm_instr_load_w1_signed_halfword_u1_p1_reg__le
1423
#define A__NAME_PC arm_instr_load_w1_signed_halfword_u1_p1_reg_pc
1424
#define A__NAME_PC__eq arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__eq
1425
#define A__NAME_PC__ne arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__ne
1426
#define A__NAME_PC__cs arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__cs
1427
#define A__NAME_PC__cc arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__cc
1428
#define A__NAME_PC__mi arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__mi
1429
#define A__NAME_PC__pl arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__pl
1430
#define A__NAME_PC__vs arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__vs
1431
#define A__NAME_PC__vc arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__vc
1432
#define A__NAME_PC__hi arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__hi
1433
#define A__NAME_PC__ls arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__ls
1434
#define A__NAME_PC__ge arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__ge
1435
#define A__NAME_PC__lt arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__lt
1436
#define A__NAME_PC__gt arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__gt
1437
#define A__NAME_PC__le arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__le
1438
#define A__SIGNED
1439
#define A__L
1440
#define A__W
1441
#define A__H
1442
#define A__U
1443
#define A__P
1444
#define A__REG
1445
#include "
cpu_arm_instr_loadstore.cc
"
1446
#undef A__SIGNED
1447
#undef A__L
1448
#undef A__W
1449
#undef A__H
1450
#undef A__U
1451
#undef A__P
1452
#undef A__REG
1453
#undef A__NAME__eq
1454
#undef A__NAME__ne
1455
#undef A__NAME__cs
1456
#undef A__NAME__cc
1457
#undef A__NAME__mi
1458
#undef A__NAME__pl
1459
#undef A__NAME__vs
1460
#undef A__NAME__vc
1461
#undef A__NAME__hi
1462
#undef A__NAME__ls
1463
#undef A__NAME__ge
1464
#undef A__NAME__lt
1465
#undef A__NAME__gt
1466
#undef A__NAME__le
1467
#undef A__NAME_PC__eq
1468
#undef A__NAME_PC__ne
1469
#undef A__NAME_PC__cs
1470
#undef A__NAME_PC__cc
1471
#undef A__NAME_PC__mi
1472
#undef A__NAME_PC__pl
1473
#undef A__NAME_PC__vs
1474
#undef A__NAME_PC__vc
1475
#undef A__NAME_PC__hi
1476
#undef A__NAME_PC__ls
1477
#undef A__NAME_PC__ge
1478
#undef A__NAME_PC__lt
1479
#undef A__NAME_PC__gt
1480
#undef A__NAME_PC__le
1481
#undef A__NAME__general
1482
#undef A__NAME_PC
1483
#undef A__NAME
arm_instr_invalid
void arm_instr_invalid(struct cpu *, struct arm_instr_call *)
arm_pc_to_pointers
void arm_pc_to_pointers(struct cpu *)
misc.h
machine.h
cpu.h
cpu_arm_instr_loadstore.cc
cpu
Definition:
cpu.h:326
arm_instr_nop
void arm_instr_nop(struct cpu *, struct arm_instr_call *)
memory.h
quick_pc_to_pointers.h
Generated on Tue Mar 24 2020 14:04:48 for GXemul by
1.8.17