sh4_bscreg.h Source File
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41 #define SH3_BCR1 0xffffff60
42 #define SH3_BCR2 0xffffff62
43 #define SH3_WCR1 0xffffff64
44 #define SH3_WCR2 0xffffff66
45 #define SH3_MCR 0xffffff68
46 #define SH3_DCR 0xffffff6a
47 #define SH3_PCR 0xffffff6c
48 #define SH3_RTCSR 0xffffff6e
49 #define SH3_RTCNT 0xffffff70
50 #define SH3_RTCOR 0xffffff72
51 #define SH3_RFCR 0xffffff74
52 #define SH3_BCR3 0xffffff7e
54 #define SH4_BCR1 0xff800000
55 #define SH4_BCR2 0xff800004
56 #define SH4_WCR1 0xff800008
57 #define SH4_WCR2 0xff80000c
58 #define SH4_WCR3 0xff800010
59 #define SH4_MCR 0xff800014
60 #define SH4_PCR 0xff800018
61 #define SH4_RTCSR 0xff80001c
62 #define SH4_RTCNT 0xff800020
63 #define SH4_RTCOR 0xff800024
64 #define SH4_RFCR 0xff800028
65 #define SH4_PCTRA 0xff80002c
66 #define SH4_PDTRA 0xff800030
67 #define SH4_PCTRB 0xff800040
68 #define SH4_PDTRB 0xff800044
69 #define SH4_GPIOIC 0xff800048
70 #define SH4_BCR3 0xff800050
71 #define SH4_BCR4 0xfe0a00f0
73 #define BCR1_LITTLE_ENDIAN (1 << 31)
74 #define BCR1_MASTER (1 << 30)
75 #define BCR1_BREQEN (1 << 19)
77 #define BCR2_PORTEN (1 << 0)
79 #define RTCSR_CMF (1 << 7)
80 #define RTCSR_CMIE (1 << 6)
81 #define RTCSR_CKS 0x0038
82 #define RTCSR_OVF (1 << 2)
83 #define RTCSR_OVIE (1 << 1)
84 #define RTCSR_LMTS (1 << 0)
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